This document provides an overview of phase locked loops (PLL) including: 1. The basic components of a PLL including a phase detector, low pass filter, and voltage controlled oscillator that work together in a closed loop to lock the output frequency and phase to the input signal. 2. Examples of PLL applications such as frequency multiplication, FM demodulation, and motor speed control. 3. A more detailed description of the 565 PLL IC including its pin configuration and characteristics such as operating frequency range and drift with temperature/voltage.

1. ANALOG ELECTRONICS
PHASE LOCKED LOOP
PREET|patel
151310109032
2nd B.E. Electrical
AIIE

2. CONTENTS
• Introduction
• Block diagram of PLL
• Phase detector
• Low pass filter
• Voltage controlled oscillator
• Pin diagram of PLL
• Characteristic of 565 PLL
• Application of PLL
• PLL as a frequency synthesizer
• AM detection using PLL 2

3. INTRODUCTION
• Phase locked loop(PLL) is basically a closed loop system. Its application is to lock
the output frequency and phase of input signal.
• PLL is also used for communication circuits in two different ways:
• For demodulation application
• Synchronization of signal
• PLL principle is used in application such as FM demodulation, FSK demodulation,
motor speed control, frequency multiplication and division.
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4. BLOCK DIAGRAM of PLL
PHASE DETECTOR LOW PASS FILTER
VOLTAGE
CONTROLLED
OSCILLATOR (VCO)
Input Output
Ve Vc
Vo , foVi , fi
Feedback Path
A BASIC PHASE LOCKED LOOP
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5. PHASE DETECTOR
• The two inputs to a phase detector or comparator are the input voltage Vi,
at frequency fi and the feedback voltage from a Voltage controlled oscillator
(VCO) at frequency fo.
• The phase detector compares these two signals and produces a dc voltage
Ve, which is proportional to the phase difference between fi and fo. The
output voltage Ve of the phase detector is called as “error voltage”. This
error voltage is then applied to a low pass filter.
PHASE DETECTOR
• ANALOG
• DIGITAL
• FLIP-FLOP
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Types

6. LOW PASS FILTER
• The low pass filter removes the high frequency noise present in the phase
detector output and produces a ripple-free dc level.
• This dc level is amplified to an adequate level and applied to a voltage controlled
oscillator. The dc amplifier output voltage is called as the control voltage Vc .
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7. VOLTAGE CONTROLLED OSCILLATOR
• The control voltage Vc is applied at the input of a VCO. The output frequency of VCO
is directly proportional to the dc control voltage Vc .
• The VCO frequency fO is compared with the input frequency fi by the phase
detector and it (VCO frequency) is adjusted continuously until it is equal to the
input frequency fi . i.e
fO = fi
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8. PLL IC 565
Pin Configuration
1
2
3
4
5
6
7
14
13
12
11
10
9
8
SE/NE 565
-V
Input
Input
VCO Output
Phase Comparator VCO Output
Reference Output
Demodulated Output External Resistor for VCO
External Capacitor for VCO
+V
NC
NC
NC
NC
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9. CHARACHTERISITIC of 565 PLL
Sr No. CHARACTERISTIC RANGE/VALUE
1 Operating frequency range 0.001Hz to 500KHz
2 Operating voltage range ±6 to ±12
3 Input level required for tracking 10mV rms minimum to 3Vp-p maximum
4 Input impedance 10kΩ typically
5 Output sink current 1mA typically
6 Output source current 10mA typically
7 Drift in VCO center frequency fo with temperature 300 ppm/°C typically
8 Drift in VCO center frequency fo with supply voltage 1.5% / V maximum
9 Triangular wave amplitude Typically 2.4 Vp-p at ±6 supply voltage
10 Triangular wave amplitude Typically 5.4 Vp-p at ±6 supply voltage
11 Bandwidth adjustment range < ± 1 to > to ± 60%
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10. APPLICATION OF PLL
• PLL can be used as:
• Frequency Multiplication
• Frequency Translation
• AM Detection
• FM Detection
• FSK Demodulation
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11. Crystal
Oscillator
Divide by
M network
Phase
detector
Low pass
filter
Error
amplifier
VCO
Divide by
N network
PLL as a FREQUENCY SYNTHESIZER
Output
fvco =
𝑓 𝑜𝑠𝑐
𝑁
𝑀
𝑓 𝑜𝑠𝑐 𝑁
𝑀
Input𝑓 𝑜𝑠𝑐
PHASE LOCKED LOOP
BLOCK DIAGRAM 11

12. OPEARATION of PLL as a FREQUENCY SYNTEHSIZER
• The frequency synthesizer is supposed to produce an output signal, the frequency of which
can be precisely adjusted to any value in a prescribed range. The output of a synthesizer
should be stable.
• In order to ensure the stability of output frequency, a crystal oscillator of frequency fosc is
used.
• The output frequency of crystal oscillator is divided by M with the help of M network. Thus
the input frequency to PLL is (fosc/M) as shown in following figure.
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13. • The PLL will compare this frequency with the frequency at the output of divide by
N network, and will try to adjust this frequency equal to
𝑓 𝑜𝑠𝑐
𝑀
.
• In order to obtain the same frequency i.e. (fosc/M) at the output of divide by N
network, the VCO frequency should be adjusted to:
fvco =
𝑓 𝑜𝑠𝑐 𝑁
𝑀
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14. AM DETECTION USING PLL
Phase shift
at 90o
Phase
detector
Low Pass
filter
14
PLL
VCO output
Demodulatedoutput
AM Input
BLOCK DIAGRAM

15. • The AM signal to be demodulated is applied to the 90o phase shifting network as
well as the PLL.
• The PLL is locked to the carrier frequency of the AM signal. Therefore the VCO
output frequency is same as the unmodulated carrier.
• When the VCO output is locked with AM signal perfectly, the phase shift between
the two is 90o
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OPEARATION of PLL as a AM DETECTOR

16. • In order to nullify this phase shift, the AM signal is phase shifted by 90°. This will bring
both the inputs to the phase detector in phase.
• The phase detector circuit is basically a multiplier which will produce both sum and
difference components of frequencies at its output.
• The low pass filter will allow only those frequency components which are close to
carrier and lower than it.
• The advantage of using the AM detector using PLL is its high noise immunity which is not
possible to obtain using the conventional peak detector type AM detector FM Detection
using PLL.
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17. REFERENCE
• WIKIPEDIA
• TECH-MAX, J.S. KATRE
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18. THANK|you
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