This document discusses different digital logic families and characteristics. It describes Resistor-Transistor Logic (RTL) which consists of resistors and transistors, with the emitters connected to ground and collectors tied through a resistor. Transistor-Transistor Logic (TTL) is also discussed, which depends solely on transistors. TTL uses multiple emitter transistors for inputs and a totem-pole output for high speed and low impedance. The document provides details on RTL and TTL gate operations.

1. Contents:
 Introduction
 Characteristics
 Resistor-Transistor Logic
 Transistor-Transistor Logic
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2. Introduction
 A digital logic family is a group of compatible
devices with the same logic levels and supply
voltages.
 According to components used in the same logic
family, digital logic families are classified as:
 Resistor-Transistor logic
 Diode- transistor logic
 Transistor-transistor logic
 MOS families----NMOS logic, PMOS logic, CMOS logic
 Emitter-Coupled Logic
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3. Characteristics of Digital Logic Families
 Propagation delay
 Power dissipation
 Current and voltage parameter
 Noise margin and logic voltages levels
 Fan-in and Fan-out
 Current Sinking
 Current Sourcing
 Speed Power Product
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4. Resistor-Transistor logic
 RTL circuit consists of resistors and transistors.
 In which the emitters of both the transistors are connected to a
common ground and collectors of both transistors are tied
through a common collector resistor Rc to a supply voltage
Vcc.
 The resistor Rc is commonly known as passive pull-up resistor.
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
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5. Circuit Operation
 Inputs representing logic levels are applied at A and B
terminals.
 In the RTL gate the input voltage corresponding to LOW level
is required to be low enough for the corresponding transistor to
be cut off.
 Similarly, the input voltage corresponding to HIGH level
should be high enough to drive the corresponding transistor to
saturation.
 Specifications:
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6. Contd…
 When both the inputs are low, transistors Q1 and Q2 are
cut-off and the output is HIGH.
 A HIGH level on any input drives the corresponding
transistor to saturation causing the output to go LOW.
 We know that, the saturation voltage, VCE(sat) for
transistor is approximately 0.2 V. Therefore, for RTL gates
the LOW level output voltage is 0.2 V.
 In RTL a HIGH level output voltage depends on the
number of gates connected to the output.
 As number of gates connected to the output increases,
output voltage decreases. This is the deciding factor for
the fan-out of the gate. The number of gates connected to
the output also affects the propagation delay time.
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7. Wired-AND
 The RTL has a capacity called wire-AND. Since the
output is effectively a transistor, two outputs can be
wired together.
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8. Transistor -Transistor Logic(TTL)
 Transistor -Transistor Logic(TTL), is named for its
dependence on transistors alone to perform basic
logic operations.
 The basic design has been modified to improve its
performance in several respects and as a
consequence, a number of subfamilies have evolved.
 In this section we are going to study the basic
transistor configurations in TTL and its subfamily
circuits along with their characteristics.
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9. TTL Inverter
 We have seen that when the input voltage is low, the output voltage
is HIGH and vice versa. Therefore, we can make a logic inverter
from an npn transistor in the common emitter configuration.
 shows the operation of transistor inverter for both the inputs(HIGH
and LOW)using switching analogy.
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11. 2-Input TTL NAND Gates
 Its input structure consists of multiple-emitter
transistor and output structure consists of totem-
pole output. Here Q1 is an NPN transistor having
two emitters, one for each input to the gate.
 Although this circuit looks complex, we can
simplify its analysis by using the diode equivalent
of the multiple-emitter transistor Q1 as shown in
Fig.
 Diodes D2 and D3 represent the two E-B
junctions of Q1 and D4 is the collector-base
junction.
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12. Circuit Diagram
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
Truth Table
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13. A B C Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Truth Table
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14. Totem-Pole Output
 Figure shows an highlighted output configuration. Transistor
Q3 and Q4 forms a totem-pole. Such a configuration is known
as pull-up or totem pole output.
 The active pull-up formed by Q3 and Q4 has specific
advantage. The totem pole transistors are used because they
produce a low impedance output.
 Either Q3 acts as an emitter follower(HIGH output) or Q4 is
saturated(LOW output).When Q3 is conducting, the output
impedance is approximately 70 ohms; when Q4 is saturated the
output impedance is only 12 ohms.
 Either way the output impedance is low. This means that the
output voltage can change from one state to other because stray
output capacitance is rapidly charged or discharged through
low impedance output.
 Thus the propagation delay is low in totem-pole TTL logic.
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16. Advantages of TTL
 High speed operation. Fastest among the saturated logic
families. The propagation delay is about 10 ns.
 Moderate power dissipation
 Available in commercial and military versions.
 Available for wide range of functions
 Low cost
 Moderate Packaging density.
Disadvantages of TTL
 High power dissipation than CMOS
 Lower noise immunity than CMOS
 Less fan-out than CMOS
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17. Conclusion:
 The basics of digital logic families and its characteristics have been
explained.
 The RTL and TTL devices have been discussed briefly.
References:
 Mandal, “Digital Electronics Principles & Application, McGraw Hill
Edu, 2013.
 William Keitz, Digital Electronics-A Practical Approach with
VHDL, Pearson, 2013.
 Thomas L.Floyd, ‘Digital Fundamentals’, 11th edition, Pearson
Education, 2015.
 Charles H.Roth, Jr, Lizy Lizy Kurian John, ‘Digital System Design
using VHDL, Cengage,2013.
 D.P.Kothari,J.S.Dhillon, ‘Digital circuits and Design’,Pearson
Education, 2016.
 A.P.Godse., Dr.D.A.Godse, ‘Digital Logic Circuits’, Technical
Publications Third Edition 2016
 Other Web Sources
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