The document discusses the structure and operation of MOS transistors. It describes the basic MOS structure which consists of a metal gate separated from a semiconductor substrate by an oxide layer. Applying a voltage to the gate can induce an inversion layer in the semiconductor to form a channel between the source and drain, allowing current to flow. The threshold voltage is the minimum gate voltage required to form an inversion layer. The document discusses n-channel MOSFETs and their characteristics in different regions of operation defined by the gate-source voltage.

1. MOS Transistor
Mr. HIMANSHU DIWAKAR
ASSISTANT PROFESSOR
JETGI

2. MOS Structure
(Two Terminal MOS Structure )

3. MOS Structure
Metal Oxide(Sio2) Semiconductor
( Energy band diagram for Metal, Oxide(Sio2) and
Semiconductor )

4. MOS Structure

5. MOS Structure
( Energy band diagram of Combined MOS system )

6. MOS System under External Bias

7. MOS System under External Bias

8. MOS System under External Bias
( N MOS operating in surface inversion region )

9. Structure and Operation of MOSFET
( N channel Enhancement MOSFET )

10. Structure and Operation of MOSFET

11. Structure and Operation of MOSFET
( Formation of Depletion Region in N type
Enhancement type MOSFET )

12. Structure and Operation of MOSFET

13. Threshold voltage
( N channel depletion MOSFET )

14. Operation of MOSFET Transistor
a) Linear region

15. Operation of MOSFET Transistor
b) Saturation region

16. Operation of MOSFET Transistor
c) Beyond Saturation region

17. Characteristics of MOSFET
a) Gradual Channel Approximation

18. Characteristics of MOSFET
a) Gradual Channel Approximation
( V- I characteristics of nMOS Transistor )

19. Characteristics of MOSFET

20. Characteristics of MOSFET

22. n-MOS Transistor - Structure

23. The MOS Transistor
n+n+
p-substrate
Field-Oxyde
(SiO2)
p+ stopper
Polysilicon
Gate Oxyde
DrainSource
Gate
Bulk Contact
CROSS-SECTION of NMOS Transistor

24. Carriers and Current
• Carriers always flow from the Source to Drain
• NMOS: Free electrons move from Source to Drain.
Current direction is from Drain to Source.
• PMOS: Free holes move from Source to Drain.
Current direction is from Source to Drain.

25. IGFET
• The dimension of SiO2 layer is about 0.02 to 0.1 micron.
• Gate is isolated thus Insulated-Gate FET
• Due to insulation the current flowing through the gate
terminal is extremely small of the order of 10^-15 A.
• Drain is always kept as more positive than the source.
• The current flows from the Drain to Source
• P-n junctions are kept under the reverse bias conditions
• Typically the Length of the device is from 1 to 10 micron.

26. MOS Transistor structure
Polysilicon –Heavily doped non crystalline silicon.
Polysilicon allows the dimensions of the transistor to be
realized accurately.
Gate Oxide – Silicon dioxide.
Thickness of gate oxide – 7 to 20nm.
No d.c. through gate.
Normally, p substrate is connected to 0V in digital circuits
and to negative voltage in analog circuits.

27. Symmetry
The transistor is symmetric:
The Drain (which is equivalent to a BJT’s Collector)
and the Source (which is equivalent to a BJT’s
Emitter) are fully symmetric and therefore
interchangeable.

28. All MOS p-n Junctions
Unlike a BJT transistor, in which one of the p-n
junctions is typically forwardly biased, and the
other reversely biased, in a MOSFET all p-n
junctions must always be kept reversely biased!

29. REGION OF OPERATION CASE-1 (No Gate
Voltage)
• Two diodes back to back exist in series.
• One diode is formed by the pn junction between the n+ drain
region and the p-type substrate
• Second is formed by the pn junction between the n+ source
region and the p-type substrate
• These diodes prevent any flow of the current.
• There exist a very high resistance.

30. REGION OF OPERATION Creating a
channel
• Apply some positive voltage on the gate terminal.
• This positive voltage pushes the holes downward in the
substrate region.
• This causes the electrons to accumulate under the gate
terminal.
• At the same time the positive voltage on the gate also attracts
the electrons from the n+ region to accumulate under the
gate terminal.

31. REGION OF OPERATION Creating a
channel
• Apply some positive voltage on the gate terminal.
• This positive voltage pushes the holes downward in the
substrate region.
• This causes the electrons to accumulate under the gate
terminal.
• At the same time the positive voltage on the gate also
attracts the electrons from the n+ region to accumulate
under the gate terminal.

35. REGION OF OPERATION Creating a
channel
• When sufficient electrons are accumulated under the gate an n-
region is created, connecting the drain and the source
• This causes the current to flow from the drain to source
• The channel is formed by inverting the substrate surface from
p to n, thus induced channel is also called as the inversion
layer.
• The voltage between gate and source called Vgs at which there
are sufficient electron under the gate to form a conducting
channel is called threshold voltage Vth .

36. MOS Channel Formation

37. MOS Transistor - Symbols

38. Operation – nMOS Transistor
Accumulation Mode - If Vgs < 0, then an electric field is
established across the substrate.
Depletion Mode -If 0<Vgs< Vtn, the region under gate will be
depleted of charges.
Inversion Mode – If Vgs > Vtn, the region below the gate will be
inverted.

39. Operation – nMOS Transistor

40. Operation – nMOS Transistor

41. Operation – nMOS Transistor

42. THANK YOU