14827 mosfet

MOSFET
• Insulated Gate Field Effect Transistor
(IGFET)
or
• Metal Oxide Semiconductor Field Effect
Transistor (MOSFET)
Er. Vikram Kumar Kamboj

Types of MOSFET
• 1. Depletion MOSFET (D-MOSFET)
• 2. Enhancement MOSFET(E-MOSFET)
• 3. Depletion-Enhancement MOSFET
(DE-MOSFET)

Types (According to Channel)
• P-Channel MOSFET
• N-Channel MOSFET

MOSFET Structure
Source Gate Drain
n+ L
p-Si
Gate Oxide
Field Oxide
Bulk (Substrate)

Symbols
G
D
S
B G
D
S
B
p Channel MOSFET n Channel MOSFET

MOSFET Symbols
gate body
A circle is sometimes
used on the gate terminal
to show active low input
drain
gate body
source
or or
drain
gate body
source
drain
source
drain
gate body
source
A) n-channel MOSFET B) p-channel MOSFET

DE-MOSFET symbol

Comparison of Symbols

Metal Oxide Semiconductor Field
Effect Transistor
Simplified Schematic of a MOSFET
The MOSFET shown in the adjacent figure is an n-channel
MOSFET, in which electrons flow from
source to drain in the channel induced under the gate
oxide. Both n-channel and p-channel MOSFETs are
extensively used. In fact, CMOS IC technology relies
on the ability to use both devices on the same chip.
The table below shows the dopant types used in each
region of the two structures.
n-channel MOSFET p-channel MOSFET
Substrate (Channel) p N
Gate Electrode n+ p+
Source and Drain n+ p+

Physical Structure of MOS FETS
NMOS
PMOS
[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Device Operation Schematic
Figure shows an n-channel MOSFET
with voltages applied to its four
terminals. Typically, VS = VB and VD >
VS. For simplicity, we assume that the
body and the source terminals are tied
to the ground, ie. VSB=0. This yields
VGS = VGB - VSB = VGB = VG
VDS = VDB - VSB = VDB = VD

SiO2 Insulator (Glass)
Gate
Source Drain
holes
electrons
5 volts
electrons to be
transmitted
MOSFET Operation
Step 1: Apply Gate Voltage
N N
Step 2: Excess electrons surface in
channel, holes are repelled.
Step 3: Channel becomes saturated
with electrons. Electrons in source
are able to flow across channel to
Drain.
P

Regions of MOSFET Operation

Off-State Region
• With a small positive voltage on the drain and
no bias on the gate
• i.e. VDS > 0 and VGS = 0, the drain is a reverse
biased pn junction
• Conduction band electrons in the source region
encounter a potential barrier determined by the
built-in potential of the source junction
• As a result electrons cannot enter the channel
region and hence, no current flows from the
source to the drain
• This is referred to as the “off” state

Linear Region
•With a small positive bias on the gate, electrons can enter the channel and a current
flow from source to drain is established
•In the low drain bias regime, the drain current increases almost linearly with drain
bias
•Indeed, here the channel resembles an ideal resistor obeying Ohm’s law
•The channel resistance is determined by the electron concentration in the channel,
which is a function of the gate bias
•Therefore, the channel acts like a voltage controlled resistor whose resistance is
determined by the applied gate bias
•As the gate bias is increased, the slope of the I-V characteristic gradually increases
due to the increasing conductivity of the channel
•We obtain different slopes for different gate biases
•This region where the channel behaves like a resistor is referred to as the linear
region of operation
•The drain current in the linear regime is given by
ù
1
I W m
= ¢ é - - 2
( ) úû
D lin ox GS T DS DS C V V V V
êë
, L
2

Saturation Region
For larger drain biases, the drain current saturates and becomes independent
of the drain bias
Naturally, this region is referred to as the saturation region
The drain current in saturation is derived from the linear region current,
which is a parabola with a maximum occurring at VD,sat given by
VD,sat =
VGS - VT
a
To obtain the drain current in saturation, this VD,sat value can be substituted
in the linear region expression, which gives
( )
C V V
I = W m ¢ -
2
2
,
GS T
D sat ox
L

FET output characteristics

Current-Voltage Characteristic
I B C D DS
A
VDS

Transfer characteristics
– similar shape for all forms of FET – but with a
different offset
– not a linear response, but over a small region
might be considered to approximate a linear
response

Normal operating ranges for FETs

• When operating about its operating point
we can describe the transfer characteristic
by the change in output that is caused by a
certain change in the input
– this corresponds to the slope of the earlier
curves
– this quantity has units of current/voltage, which
is the reciprocal of resistance (this is
conductance)
– since this quantity described the transfer
characteristics g = D
I
D
it is called g the
¹ I
D
m transconductance, D
V
m GS
gV
GS
m

• Small-signal equivalent circuit of a FET
– models the behaviour of the device for small
variations of the input about the operating point

Summary of FET Characteristics
• FETS have three terminals: drain, source and
gate
• The gate is the control input
• Two polarities of device: n-channel and p-channel
20.6
• Two main forms of FET: MOSFET and JFET
• In each case the drain current is controlled by
the voltage applied to the gate with respect to
the source

Applications

FET Amplifiers
• A simple DE MOSFET amplifier
– RG is used to ‘bias’ the
gate at its correct operating
point (which for a
DE MOSFET is 0 V)
– C is a coupling capacitor
and is used to couple the
AC signal while preventing
externals circuits from
affecting the bias
– this is an AC-coupled amplifier
20.7

• AC-coupled amplifier
– input resistance – equal to RG
– output resistance – approximately equal to RD
– gain – approximately –gmRD (the minus sign
shows that this is an inverting amplifier)
– C produced a low-f = frequency 1
cut-off at a
frequency fgiven c by
2pCR
c where R is the Er. input Vikram Kumar resistance Kamboj
of the amplifier
(which in this case is equal to R)

• Negative feedback amplifier
– reduces problems of variability
of active components
– voltage across Rs is
proportional to drain current,
which is directly proportional
to the output voltage
– this voltage is subtracted
from input voltage to gate
– hence negative feedback

• Source follower
– similar to earlier circuit,
but output is now taken
from the source
– feedback causes the
source to follow the input
voltage
– produces a unity-gain
amplifier
– also called a source follower

Other FET Applications
• A voltage controlled attenuator
– for small drain-to-source
voltages FETs resemble
voltage-controlled resistors
– the gate voltage VG is used
to control this resistance and
hence the gain of the potential
divider
– used, for example, in automatic
gain control in radio receivers
20.8

• A FET as an analogue switch

• A FET as a logical switch

Key Points
• FETs are widely used in both analogue and digital circuits
• They have high input resistance and small physical size
• There are two basic forms of FET: MOSFETs and JFETs
• MOSFETs may be divided into DE and Enhancement types
• In each case the gate voltage controls the current from the drain
to the source
• The characteristics of the various forms of FET are similar except
that they require different bias voltages
• The use of coupling capacitors prevents the amplification of DC
and produced AC amplifiers
• FETs can be used to produce various forms of amplifier and a
range of other circuit applications

• Importance for LSI/VLSI
– Low fabrication cost
– Small size
– Low power consumption
• Applications
– Microprocessors
– Memories
– Power Devices
• Basic Properties
– Unipolar device
– Very high input impedance
– Capable of power gain
– 3/4 terminal device, G, S, D, B
– Two possible device types: enhancement mode; depletion
mode
– Two possible channel types: n-channel; p-channel

Analysis: Low VDS
(A)
I
Q
DS
n
TR
= -
t
Q
t t
L
v
n
TR
v
d
d
=
=
=
=
Channel Charge
Channel Transit Time
Drift Velocity
TR m
L
V
n DS
=
2
Q CV
=
= - ( - )
C V V WL
n
O GS T
I
C V V WL
m ( - )
n O GS T
V DS
=
2
DS L
I
W
L
C V V V DS n O GS T DS = m ( - )

Analysis: Intermediate VDS
Q C V
V
DS
= - ( - - V )
WL n O G
T 2
First Order Approximation
Gate to Channel Voltage = VGS-VDS/2
I
W
L
C V V
V
V
W
L
C V V V
V
DS n O G T
DS
DS
n O G T DS
2
DS
= æè ç
öø ÷
- - æè ç
öø ÷
= æè ç
öø ÷
- -
æ
è ç
ö
ø ÷
m
m
2
2
( )
Extra term!

Large VDS: Saturation (C)
Source Channel Drain
VG
VDS
VT
VG-channel
Pinch-off

Analysis: Saturation (C)
Pinch-off
V sat V V DS G T ( ) = -
Substitute for VDS(sat) in equation for IDS to get IDS(sat)
I
W
L
æ
= C V V V
æè ç
DS V
öø ÷
- -
è ç
DS n O GS T DS
ö
ø ÷
m ( )
2
2
æ -
( ) ( )
DS n O GS T
( )
I sat
W
L
C V V
V V
W
L
C V V
GS DS
n
O GS T
( )
= æè ç
öø ÷
- -
è ç
ö
ø ÷
= æè ç
öø ÷
-
=
m
m
2
2
2
2
2
constant

Avalanche and Punch-Through
(D)
• For very large VDS, IDS increases rapidly due to drain
junction avalanche.
• Can give rise to parasitic bipolar action.
• In short channel transistors, the drain depletion region may
reach the source depletion region giving rise to ‘Punch
Through’.

14827 mosfet

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