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ANALOG ELECTRONICS
MODULE 2
• Specific Objectives
To describe the construction, working of JFET and MOSFET
To plot the drain and transfer characteristics of JFET & MOSFET
To define pinch off voltage
Current Controlled vs Voltage Controlled Devices
ADVANTAGES OF FET
FETs are voltage controlled unipolar devices. BJTs are current
controlled bipolar devices.
FETs have a higher input impedance. BJTs have higher gains.
FETs are less sensitive to temperature variations and are more easily
integrated on ICs.
FETs are immune to noise and radiations.
Types of FET’s
• JFET –Junction Field Effect Transistor
• N channel
• P channel
• MOSFET –Metal Oxide Semiconductor Field Effect
Transistor
• D-MOSFET -Depletion Mode MOSFET
• E-MOSFET -Enhancement Mode MOSFET
There are two types of JFET’s: n-channel and p-channel. N-channel is widely used
There are three terminals: Drain (D) and Source (S) are connected to n-channel
Gate (G) is connected to the p-type material
N-Channel JFET Symbol
OPERATING PRINCIPLE OF A FET
 The circuit diagram of an n-channel FET
with normal polarities.
 When a voltage VDS is applied across
the drain and source terminals and
voltage applied across the gate and
source VGS= 0, the two PN junctions
establish a very thin depletion layer.
 Thus a large amount of electrons will
flow from source to drain through a
wide channel formed between the two
depletion layers.
(B)
(A)
• When a reverse voltage VGS is applied across the gate and source, the
width of the depletion layer is increased.
• This reduces the width of the conducting channel thereby decreasing
the conduction (flow of electrons) through it.
• Thus, the current flowing from source to drain depends upon the
width of the conducting channel which depends upon the thickness
of depletion layer.
• The thickness of depletion layer established by the two pn junctions
depends upon the voltage applied across the gate-source terminals.
• Hence , it is clear that the current from source to drain can be
controlled by the application of potential on the gate.
• That is why, the device is called field effect transistor.
FET CHARACTERISTICS
• A curve drawn between the drain current (ID) and drain-source
voltage (VDS) of a FET at constant gate-source voltage (VGS) is known
as output characteristics of the FET.
• To determine the characteristics of a FET, make the circuit as shown
below in figure.
CIRCUIT OF AN N CHANNEL FET
• Fix the gate-source voltage (VGS) at
some value (VGS=0) and from zero,
increase the drain-source voltage (VDS)
in steps. Note down the drain current
ID corresponding to each value of VDS.
• Plot the curve which shows the output
characteristics (curve) of the FET.
• Now after changing the value of VGS to
0.5, 1, 2, 3 and 4 volts, repeat the
same procedure
FET CHARACTERISTICS
• The following points are worth
noting from the characteristics
• (i) At the initial stage, the drain
current ID increases rapidly with
the increase in drain source
voltage VDS but then becomes a
constant.
The drain-source voltage above
which drain current becomes
almost constant is known as
pinch off voltage.
The curve for which VGS=0, the
pinch off voltage is OA.
• However , with increasing current, the ohmic voltage drop between
the source and the channel region reverse bias the junction which
constricts the conducting portion of the channel.
• Eventually a voltage is reached at which the channel is pinched off and
the voltage is known as pinch off voltage.
(ii) After pinch off voltage, the depletion layers almost touch each other
and the conducting channel becomes very narrow. Therefore, the
increase in drain current ID is very small with the increase in drain
source voltage VDS. Thus, the drain current almost becomes constant.
The reason for the above behaviour of the device is because at the
initial stage, the n-type bar acts as a simple semiconductor resistor
and the current Id increases linearly with VDS
• (iii) When the gate-source voltage VGS is applied in the direction to
provide additional reverse bias, the pinch off voltage will occur at
smaller values of VDS. Thus, the maximum value of drain current will
be smaller.
• Further increase in drain-source voltage VDS will eventually cause the
avalanche breakdown across the reverse-biased gate junction and the
current ID shoots to a very high value. Since the reverse-bias gate
voltage adds to the drain voltage, the more the reverse bias at the
gate, more the effective voltage across the gate junction. Therefore,
the avalanche occurs at a lower value of VDS when the gate is more
reverse-biased.

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MODULE 2 FET.pptx

  • 2. MODULE 2 • Specific Objectives To describe the construction, working of JFET and MOSFET To plot the drain and transfer characteristics of JFET & MOSFET To define pinch off voltage
  • 3. Current Controlled vs Voltage Controlled Devices
  • 4. ADVANTAGES OF FET FETs are voltage controlled unipolar devices. BJTs are current controlled bipolar devices. FETs have a higher input impedance. BJTs have higher gains. FETs are less sensitive to temperature variations and are more easily integrated on ICs. FETs are immune to noise and radiations.
  • 5. Types of FET’s • JFET –Junction Field Effect Transistor • N channel • P channel • MOSFET –Metal Oxide Semiconductor Field Effect Transistor • D-MOSFET -Depletion Mode MOSFET • E-MOSFET -Enhancement Mode MOSFET
  • 6. There are two types of JFET’s: n-channel and p-channel. N-channel is widely used There are three terminals: Drain (D) and Source (S) are connected to n-channel Gate (G) is connected to the p-type material
  • 8. OPERATING PRINCIPLE OF A FET  The circuit diagram of an n-channel FET with normal polarities.  When a voltage VDS is applied across the drain and source terminals and voltage applied across the gate and source VGS= 0, the two PN junctions establish a very thin depletion layer.  Thus a large amount of electrons will flow from source to drain through a wide channel formed between the two depletion layers. (B) (A)
  • 9. • When a reverse voltage VGS is applied across the gate and source, the width of the depletion layer is increased. • This reduces the width of the conducting channel thereby decreasing the conduction (flow of electrons) through it. • Thus, the current flowing from source to drain depends upon the width of the conducting channel which depends upon the thickness of depletion layer. • The thickness of depletion layer established by the two pn junctions depends upon the voltage applied across the gate-source terminals.
  • 10. • Hence , it is clear that the current from source to drain can be controlled by the application of potential on the gate. • That is why, the device is called field effect transistor.
  • 11. FET CHARACTERISTICS • A curve drawn between the drain current (ID) and drain-source voltage (VDS) of a FET at constant gate-source voltage (VGS) is known as output characteristics of the FET. • To determine the characteristics of a FET, make the circuit as shown below in figure.
  • 12. CIRCUIT OF AN N CHANNEL FET • Fix the gate-source voltage (VGS) at some value (VGS=0) and from zero, increase the drain-source voltage (VDS) in steps. Note down the drain current ID corresponding to each value of VDS. • Plot the curve which shows the output characteristics (curve) of the FET. • Now after changing the value of VGS to 0.5, 1, 2, 3 and 4 volts, repeat the same procedure
  • 13. FET CHARACTERISTICS • The following points are worth noting from the characteristics • (i) At the initial stage, the drain current ID increases rapidly with the increase in drain source voltage VDS but then becomes a constant. The drain-source voltage above which drain current becomes almost constant is known as pinch off voltage. The curve for which VGS=0, the pinch off voltage is OA.
  • 14. • However , with increasing current, the ohmic voltage drop between the source and the channel region reverse bias the junction which constricts the conducting portion of the channel. • Eventually a voltage is reached at which the channel is pinched off and the voltage is known as pinch off voltage. (ii) After pinch off voltage, the depletion layers almost touch each other and the conducting channel becomes very narrow. Therefore, the increase in drain current ID is very small with the increase in drain source voltage VDS. Thus, the drain current almost becomes constant. The reason for the above behaviour of the device is because at the initial stage, the n-type bar acts as a simple semiconductor resistor and the current Id increases linearly with VDS
  • 15. • (iii) When the gate-source voltage VGS is applied in the direction to provide additional reverse bias, the pinch off voltage will occur at smaller values of VDS. Thus, the maximum value of drain current will be smaller. • Further increase in drain-source voltage VDS will eventually cause the avalanche breakdown across the reverse-biased gate junction and the current ID shoots to a very high value. Since the reverse-bias gate voltage adds to the drain voltage, the more the reverse bias at the gate, more the effective voltage across the gate junction. Therefore, the avalanche occurs at a lower value of VDS when the gate is more reverse-biased.