Latches are asynchronous electronic logic circuits with two stable output states. There are four main types of latches: D, T, SR, and JK latches. An SR latch has two inputs - SET (S) and RESET (R) - and two complementary outputs (Q and Q'). The state of the latch depends on whether input S or R is activated. A D latch similarly has one data input and two complementary outputs, but removes invalid states that can occur in an SR latch. Latches can be either active-high or active-low, depending on whether a high or low input triggers a state change.

1. LATCHES
BY UNSA SHAKIR

3. What is Latch?
 Latches are asynchronous – which means, the output of
the latch depends on its input.
 There are four types of latches:
D, T, SR and JK latch

4. Introduction:
• Latch is an electronic logic circuit with two stable states
i.e. it is a bistable multivibrator.
• Latch is a type of temporary storage device.
• Latch has the bistable stable (two stable) states.
• There are two inputs and two outputs of the latch.
• The outputs of the circuit are compliment of each other

5. Working
 Latch circuits can work in two states depending on
the triggering signal being high or low: Active – High
or Active – Low.
• In case of Active – High latch circuits, normally both
the inputs are low. The circuit is triggered by a
momentary high on either of the inputs.
• In case of Active – Low latch circuits, normally both
the inputs are high. The circuit is triggered by a
momentary low on either of the input

6. SR latch
 The basic storage element.
 There are two inputs R (RESET) and S (SET)
 There are Two outputs Q and Q’
 Where Q is never equal to Q’ and both are
complement of each other.
 The latch of NOR gate is also called the ACTIVE HIGH
INPUT LATCH.
 The latch of NAND gate is also called the ACTIVE
LOW INPUT LATCH.
 If Q=1 the condition is set
 If Q=0 he condition is reset

8. D latch
• The D-latch stands for DATA LATCH.
• The D-latch has one input but two outputs.
• NOT gate is used in the D-latch.
• D-latch removes the invalidity of the SR latch.
• Means D-latch gives correct compliment inputs on the S=1
and R=1 in NOR GATE LATCH (Active high input latch).
• And S=0 and R=0 in NAND GATE LATCH (Active low
input latch).
• If Ǫ=1 (high) then the latch is in the SET state.
• If Ǫ=0 (low) then the latch is in the RESET state.