Electronic flipflops resisters

1. CS118 1
TOPIC:
Introduction Flip-Flops and Its Types
(Lecture 2)
By – Dr Priya (Asst. Professor, CSE)

2. Types of Digital Circuits
1. Combinational Circuits
2. Sequential Circuits
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3. Combinational Circuits
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Combinational circuits are specially designed using multiple interconnected logic
gates such that the output will be generated by computing the logical
combinations of the present input only. No clock pulse is present here. Moreover,
no previously stored value or state is taken into consideration here. The output is
independent of previous states.

4. Combinational Circuits
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• In this output depends only upon present input.
• It’s Speed is fast.
• Easy designed.
• There is no feedback between input and output.
• It is time independent.
• Elementary building blocks are Logic gates.
• Used for both arithmetic and boolean operations.
• Combinational circuits don’t have the capability to store any state.
Examples of Combinational Circuits
1. Adders and Subtractors
2. Multiplexers and Demultiplexers
3. Encoders and Decoders

5. Sequential Circuits
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• The outputs of the sequential circuits depend on both present inputs and
present state(previous output).
• The feedback path is present in the sequential circuits.
• In the sequential circuit, memory elements play an important role and require.
• The clock signal is required for sequential circuits.
• It is not simple to design a sequential circuit.
Sequential Circuits are
Flip Flops
Registers
Counters
Latches etc.

6. Sequential Circuits
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Sequential circuits are digital circuits that store and use the previous state
information to determine their next state. Unlike combinational circuits, which only
depend on the current input values to produce outputs, sequential circuits depend on
both the current inputs and the previous state stored in memory elements.

7. Sequential Circuits
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There are two types of sequential circuits:
Type 1: Asynchronous sequential circuit: These circuits do not use a clock signal but
uses the pulses of the inputs. These circuits are faster than synchronous sequential
circuits because there is clock pulse and change their state immediately when there is
a change in the input signal. We use asynchronous sequential circuits when speed of
operation is important and independent of internal clock pulse. But these circuits are
more difficult to design and their output is uncertain. They are used in digital
systems to implement state machines and are commonly used in applications
that require low power consumption or where a clock signal is not available or
practical to use.

8. Sequential Circuits
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Type2: Synchronous sequential circuit: These circuits uses clock signal and level
inputs (or pulsed) (with restrictions on pulse width and circuit propagation). The
output pulse is the same duration as the clock pulse for the clocked sequential
circuits. Since they wait for the next clock pulse to arrive to perform the next
operation, so these circuits are bit slower compared to asynchronous. Level output
changes state at the start of an input pulse and remains in that until the next input or
clock pulse. We use synchronous sequential circuit in synchronous counters, flip
flops, and in the design of MOORE-MEALY state management machines.

9. Latches
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Latches are digital circuits(asynchronous) that store a single bit of information and
hold its value until it is updated by new input signals. They are used in digital
systems as temporary storage elements to store binary information. Latches can be
implemented using various digital logic gates, such as AND, OR, NOT, NAND, and
NOR gates.
There are two types of latches:
• S-R (Set-Reset) Latches: S-R latches are the simplest form of latches and are implemented using two
inputs: S (Set) and R (Reset). The S input sets the output to 1, while the R input resets the output to 0.
When both S and R are at 1, the latch is said to be in an “undefined” state.
• D (Data) Latches: D latches are also known as transparent latches and are implemented using two
inputs: D (Data) and a clock signal. The output of the latch follows the input at the D terminal as long
as the clock signal is high. When the clock signal goes low, the output of the latch is stored and held
until the next rising edge of the clock.
Latches are widely used in digital systems for various applications, including data storage,
control circuits, and flip-flop circuits. They are often used in combination with other digital
circuits to implement sequential circuits, such as state machines and memory elements.

10. Latches Contd..
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• Latches are basic storage elements that operate with signal levels (rather than
signal transitions).
• Latches controlled by a clock transition are flip-flops. Latches are level-sensitive
devices.
• Latches are useful for the design of the asynchronous sequential circuit. Latches
are sequential circuit with two stable states.
• These are sensitive to the input voltage applied and does not depend on the clock
pulse.
• Flip flops that do not use clock pulse are referred to as latch.

11. S-R (Set-Reset) Latch
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SR (Set-Reset) Latch – They are also known as preset and clear states. The SR latch forms the
basic building blocks of all other types of flip-flops.
SR Latch is a circuit with:
(i) 2 cross-coupled NOR gate or 2 cross-coupled NAND gate.
(ii) 2 input S for SET and R for RESET.
(iii) 2 output Q, Q’.
Q Q’ STATE
1 0 Set
0 1 Reset

12. Gated S-R Latch
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A Gated SR latch is a SR latch with enable input which works when enable is 1 and retain the
previous state when enable is 0.

13. Gated D Latch
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D latch is similar to SR latch with some modifications made. Here, the inputs are
complements of each other. The letter in the D latch stands for “data” as this latch stores
single bit temporarily.
Enable D Q(n) Q(n+1) STATE
1 0 x 0 RESET
1 1 x 1 SET
0 x x Q(n)
No
Change

14. Latches Contd..
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Advantages of Latches:
• Easy to Implement: Latches are simple digital circuits that can be easily
implemented using basic digital logic gates.
• Low Power Consumption: Latches consume less power compared to other
sequential circuits such as flip-flops.
• High Speed: Latches can operate at high speeds, making them suitable for use in
high-speed digital systems.
• Low Cost: Latches are inexpensive to manufacture and can be used in low-cost
digital systems.
• Versatility: Latches can be used for various applications, such as data storage,
control circuits, and flip-flop circuits.

15. Latches Contd..
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Disadvantages of Latches:
• No Clock: Latches do not have a clock signal to synchronize their operations,
making their behavior unpredictable.
• Unstable State: Latches can sometimes enter into an unstable state when both
inputs are at 1. This can result in unexpected behavior in the digital system.
• Complex Timing: The timing of latches can be complex and difficult to specify,
making them less suitable for real-time control applications.

16. Latch Circuits: Not Suitable
 Latch circuits are not suitable in synchronous logic
circuits.
 When the enable signal is active, the excitation inputs
are gated directly to the output Q. Thus, any change in
the excitation input immediately causes a change in the
latch output.
 The problem is solved by using a special timing control
signal called a clock to restrict the times at which the
states of the memory elements may change.
 This leads us to the edge-triggered memory elements
called flip-flops.

17. Memory Elements
 Memory element: a device which can remember value
indefinitely, or change value on command from its
inputs.
 Characteristic table:
Command
(at time t)
Q(t) Q(t+1)
Set X 1
Reset X 0
0 0
Memorise /
No Change 1 1
command
Memory
element stored value
Q
Q(t): current state
Q(t+1) or Q+: next state

18. Clock Signal and Triggering
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Clock signal
• A clock signal is a periodic signal in which ON time and OFF time need not be the
same. When ON time and OFF time of the clock signal are the same, a square wave
is used to represent the clock signal. Below is a diagram which represents the clock
signal:
• A clock signal is considered as the square wave. Sometimes, the signal stays at logic,
either high 5V or low 0V, to an equal amount of time. It repeats with a certain time
period, which will be equal to twice the 'ON time' or 'OFF time'.

19. Memory Elements
 Two types of triggering/activation:
 level-triggered
 edge-triggered
 Level-triggered
 latches
 ON = 1, OFF = 0
 Edge-triggered
 flip-flops
 positive edge-triggered (ON = from 0 to 1; OFF =
other time)
 negative edge-triggered (ON = from 1 to 0; OFF =
other time)

20. Types of Triggering
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These are two types of triggering in sequential circuits:
1. Level triggering
• Positive level triggering
• Negative level triggering
2. Edge triggering
• Positive edge triggering
• Negative edge triggering
Fig: 1.4 Positive Level Triggering Fig: 1.5 Negative Level Triggering
Fig: 1.6 Positive Edge Triggering Fig: 1.7 Negative Level Triggering

21. Basics of Flip Flop
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The storage elements employed in clocked sequential circuits are called flip-flops.
A flip-flops is a binary cell capable of storing one bit of information.
It has two outputs, one for the normal value and one for the complement value of
the bit stored in it.
A circuit that has two stable states is treated as a flip flop.
These stable states are used to store binary data that can be changed by applying
varying inputs. There are the following types of flip flops:
1. SR Flip Flop
2. J-K Flip-flop
3. D Flip Flop
4. T Flip Flop

22. SR Flip Flop
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The S-R flip flop is the most common
flip flop used in the digital system. In SR
flip flop, when the set input "S" is true,
the output Y will be high, and Y' will be
low. It is required that the wiring of the
circuit is maintained when the outputs
are established. We maintain the wiring
until set or reset input goes high, or
power is shutdown.

23. J-K Flip-flop
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• The JK flip flop is used to remove the
drawback of the S-R flip flop, i.e.,
undefined states. The JK flip flop is
formed by doing modification in the SR
flip flop. The S-R flip flop is improved
in order to construct the J-K flip flop.
When S and R input is set to true, the
SR flip flop gives an inaccurate result.
But in the case of JK flip flop, it gives
the correct output.
• In J-K flip flop, if both of its inputs are
different, the value of J at the next
clock edge is taken by the output Y. If
both of its input is low, then no change
occurs, and if high at the clock edge,
then from one state to the other, the
output will be toggled. The JK Flip
Flop is a Set or Reset Flip flop in the
digital system.

24. D Flip Flop
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D flip flop is a widely used flip flop in digital systems. The D flip flop is mostly
used in shift-registers, counters, and input synchronization.
Truth Table:

25. T Flip Flop
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• Just like JK flip-flop, T flip flop is used. Unlike JK flip flop, in T flip flop, there is
only single input with the clock input. The T flip flop is constructed by
connecting both of the inputs of JK flip flop together as a single input. The T
flip flop is also known as Toggle flip-flop. These T flip-flops are able to find
the complement of its state.
Truth Table: