This document discusses the achievements and challenges of MOSFETs with high-k gate dielectrics. As silicon dioxide scales thinner for Moore's Law, it allows excessive gate leakage currents due to quantum tunneling. Replacing silicon dioxide with high-k dielectric materials can help address this issue while continuing scaling. However, using high-k dielectrics introduces new challenges including high threshold voltages when paired with polysilicon gates. Replacing the polysilicon with a metal gate can help address issues of fermi level pinning and reduce mobility degradation. Intel achieved a 20% improvement in transistor switching speed by implementing high-k dielectric HfO2 and a metal gate in their 45nm transistors.

1. A
Term Paper
on
Achievements & Challenges of
MOSFET’s with High-K Gate
Dielectrics
Course instructor : Dr.Dipanjan Basu
Presented by :Anubhav Srivastava
Bandarupalli Jayadeepthi
Noor Mohamed EV

2. Why this is required…….?
 Scaling of transistor to drive Moore’s Law
 SiO₂ is running out of atoms for further scaling
but still scaling continues.
Thickness of SiO₂ layer required in 45nm technology is
about 1.2nm (4 atomic layers deep!!)
 Quantum Mechanical phenomenon of electron
tunneling results in Gate Leakage Current….!

3. Gate Leakage Current
Quantum mechanical tunneling
 Tunneling current increases exponentially
with decrease in oxide thickness

4. Choice of High-K oxide
High-K oxide should satisfy the following properties:
1. High Dielectric constant and Barrier Height
2. Thermodynamic stability
3. Interface Quality
 Volume expansion
caused by cubic to
tetragonal to monoclinic
transformation induces
large stress in ZrO2

5. The Challenges for High-K
Dielectric Development

6. High-K and Poly-Si Incompatibility due
to Fermi Level Pinning
Defect formation at the polySi and
high-K interface is most likely the
cause of the Fermi level pinning in the
upper part of the band gap which
causes high threshold voltages in
MOSFET (M=Zr or Hf)
Results in:
1. High threshold voltage
2. Low drive current
So the need to replace poly-Si
gate by a suitable metal

7.  Mobility Degradation
Coulombic scattering :
 Dominant at low field
 Caused due to high interface trapped charge
 Higher trap density near conduction band
 More severe for nMOSFET

8. Surface phonon scattering

9. The Metal Gate Solution

10. Use of Metal Gates
As a conductor metal can pack in hundred of times more
electrons than poly-Si
Metal gate electrodes (Co,Ni,Mo,W) are able to decrease
scattering and reduce the mobility degradation problem

11. Types of Metal Gates
Requires metal gate electrodes with “CORRECT” work functions
on High-K for both nMOS and pMOS transistors for high
performance.

12. Metal Gate/High-K Transistor
When SiO2 is replaced with High-K material it was found
that poly-Si and High –K material were not compatible.
So poly-Si is being replaced by a metal to make it
compatible with High-k material.

13. Mobility Improvement by using TiN
High-K/Metal-gate reduces leakage

14. Yeah…Nobody knows for sure……….!!!
 Intel achieved 20 percent improvement in transistor
switching speed by using metal Gate /high-K transistor
with HfO2 as dielectric.
Intel 45nm Transistor – performance compared to 65nm
2x improvement in transistor density
30% reduction in switching power
20% improvement in switching speed
10x reduction in gate oxide leakage power

15. Reference
Achievements and Challenges for the Electrical Performance Of MOSFET’s
with High-k Gate Dielectrics by G. Groeseneken , L. Pantisano and M. Heyns
0-7803-8454-7/04/$20.00 2004 IEEE.