This document discusses different types of field effect transistors (FETs). It describes junction FETs (JFETs), which have three leads connected to the gate, source, and drain. Depletion mode metal-oxide-semiconductor FETs (MOSFETs) isolate the metal gate from the channel with a thin oxide layer and are typically N-channel devices that are normally on. Enhancement mode MOSFETs are usually P-channel and normally off. Safety precautions are outlined for working with MOSFETs due to their sensitivity to electrostatic discharge. FETs can be tested using commercial transistor test equipment or an ohmmeter.

1. Field Effect Transistors (FETs)

2. Junction FETs
Figure 23-1. Cross section of an N-channel JFET.

3. Junction FETs (cont’d.)
Figure 23-2. Lead connections for an N-channel JFET.

4. Junction FETs (cont’d.)
Figure 23-3. Properly biased N-channel JFET.

5. Junction FETs (cont’d.)
Figure 23-4. Schematic symbols for JFETs.

6. Figure 23-5. The polarities required to bias an N-channel JFET.
Figure 23-6. The polarities required to bias a P-channel JFET.

7. Depletion Insulated Gate FETs
(MOSFETs)
Figure 23-7. N-channel depletion MOSFET.

8. Depletion Insulated Gate FETs
(MOSFETs) (cont’d.)
Figure 23-8. N-channel depletion MOSFET with bias supply.

9. Depletion Insulated Gate FETs
(MOSFETs) (cont’d.)
Figure 23-9. Schematic symbol for an N-channel depletion MOSFET.

10. Depletion Insulated Gate FETs
(MOSFETs) (cont’d.)
Figure 23-10. Properly biased N-channel depletion MOSFET.

11. Depletion Insulated Gate FETs
(MOSFETs) (cont’d.)
Figure 23-11. Schematic symbol for a P-channel depletion MOSFET.

12. Enhancement Insulated Gate
FETs (MOSFETs)
Figure 23-12. P-channel enhancement MOSFET.

13. Enhancement Insulated Gate
FETs (MOSFETs)
Figure 23-13. Schematic symbol for a P-channel enhancement MOSFET.

14. Enhancement Insulated Gate
FETs (MOSFETs)
Figure 23-14. Properly biased P-channel enhancement MOSFET.

15. Enhancement Insulated Gate
FETs (MOSFETs)
Figure 23-15. Schematic symbol for an N-channel enhancement MOSFET.

16. Enhancement Insulated Gate
FETs (MOSFETs)
Figure 23-16. Properly biased N-channel enhancement MOSFET.

17. MOSFET Safety Precautions
Keep the leads shorted together
Wear a grounded metallic wristband
Use a grounded soldering iron tip
Make sure power is off

18. Testing FETs
Commercial transistor test equipment
Ohmmeter

19. Summary
The three leads of a JFET are attached to the gate,
source, and drain
MOSFETs (insulated gate FETs) isolate the metal gate
from the channel with a thin oxide layer
Depletion mode MOSFETs are usually N-channel
devices and are classified as normally on

20. Summary (cont’d.)
Enhancement mode MOSFETs are usually P-channel
devices and are normally off
Electrostatic charges from fingers can damage a
MOSFET
JFETs and MOSFETs can be tested using a
commercial transistor tester or an ohmmeter