This document discusses 3D integrated circuits (3D ICs). It begins by introducing 3D ICs and how they allow for higher levels of miniaturization and integration by stacking separately built circuit layers. It then discusses why 3D ICs are needed due to limited space in traditional 2D chip designs. Key benefits of 3D ICs include reduced wire lengths, increased number of nearest neighbors for transistors, and heterogeneous integration. However, 3D ICs also present challenges related to thermal issues, reliability, and design complexity that must be addressed. The document surveys applications and advances in 3D ICs.

2. INTRODUCTION
 3D IC technology assures higher levels of miniaturization
and integration.
 It focuses on portraying advances in interconnect
technologies and reduction of interconnect delays.
 It is a single circuit built by stacking and integrating.
Separately-built layers

3. WHY A 3D IC?
 In modern world when the utilization of IC’s is increasing
rapidly , a problem is being observed by the IC developers
and that problem is space.
 general ICs those are in form of 2-D having a limited space.
 So developers are now a days planning on a concept that is
called 3D IC.
 In 3D IC developers use 3rd dimension to manufacture the
IC.

4. • Interconnect structures increasingly consume more of the
power and delay budgets in modern design.
• Reasonable solution: increase the number of “nearest
neighbors” seen by each transistor by using 3D IC design

5. Design tools for 3D-IC design
 Demand for EDA tools
 As the technology matures, designers will want to
exploit this design area
 No design tool is available till date for commercial purpose
 Current tool-chains
 Mostly academic
 MIT has developed a tool for the academic purpose.

6. Energy performance
 Wire length reduction has an impact on the cycle time
and the energy dissipation
 Energy dissipation decreases with the number of layers
used in the design
 Following graph is based on a 3D tool

7. Energy performance
• Energy dissipation decreases with increase in the
number of layers used in the design.

8. Concerns in 3D circuit
• Thermal Issues in 3D-circuits
• Inductance Effects
• Reliability Issues

9. Thermal Issues in 3D Circuits
• Effects dramatically impact interconnect and device
reliability in 2D circuits
• Due to reduction in chip size of a 3D implementation,
3D circuits exhibit a sharp increase in power density
• Analysis of Thermal problems in 3D is necessary to
evaluate thermal robustness of different 3D
technology and design options.

10. Heat Flow in 2D
 Heat generated arises due
to switching
 In 2D circuits we have only
one layer of Si to consider.

11. Heat Flow in 3D  With multi-layer circuits , the upper
 layers will also generate a
significant
 fraction of the heat.
 Heat increases linearly with level
increase

12. Heat Dissipation
 All active layers will be insulated from each other by layers
of dielectrics
 With much lower thermal conductivity than Si
 Therefore heat dissipation in 3D circuits can accelerate
many failure mechanisms.

13. Inductance Effects
 Interconnect Inductance Effects
 Shorter wire lengths help reduce the inductance
 Presence of second substrate close to global wires might
help lower inductance by providing shorter return paths.

14. Reliability Issues?
 Electro thermal and Thermo-mechanical effects between
various active layers can influence electro-migration and
chip performance
 Die yield issues may arise due to mismatches between die
yields of different layers, which affect net yield of 3D chips.

15. ADVANTAGES
 3D ICs offer many significant benefits, including:
 SPEED
 DESIGN
 HETEREOGENEOUS INTEGRATION
 BANDWIDTH

16. Challenges
 Yield – Each extra manufacturing step adds a
risk for defects. In order for 3D ICs to be
commercially viable, defects must be avoided
or repaired.
 Heat – Thermal buildup within the stack
must be prevented or dissipated
 Design complexity – Taking full advantage
of 3D requires elegant multi-level designs.
Chip designers will need new CAD tools to
address the 3D integration

17. WAFER LEVEL 3D
INTEGRATION:
An emerging architecture for future chips

18. APPLICATIONS
 READ-ONLY MEMORY
 DIGITAL CAMERAS
 DIGITAL AUDIO PLAYERS
 SMART CELLULAR PHONES
 GAMING DEVICES
 MEMORY CARDS

19.  Three Dimensional Read-Only Memory ( 3D - ROM).
 3D -ROM is a new non-volatile semiconductor memory
with lower cost , higher capacity and comparable
bandwidth.
 It is compatible with standard CMOS process.
 More importantly, 3D-ROM can be readily integrated with
RAM/flash ROM.

20. 3D Integration of Next-
Generation Transceivers
for Wireless Communications:

21. Conclusion
 3D IC design is a relief to interconnect driven IC design.
 Still many manufacturing and technological difficulties.
 Needs strong applications for automated design.

22. THANK YOU