this presentation contains all sort of information regarding USCI(Universal Serial Communication Interface)
UART, SPI, I2C etc.
this will be very helpful to the people those who are planning or starting projects or want to get idea how devices interfaced.
INTRODUCTION
We know that a microprocessor is the CPU of a computer. A microprocessor can perform some operation on a data and give the output. But to perform the operation we need an input to enter the data and an output to display the results of the operation. So we are using a keyboard and monitor as Input and output along with the processor. Microprocessors engineering involves a lot of other concepts and we also interface memory elements like ROM, EPROM to access the memory.
Types of Interfacing
There are two types of interfacing in context of the 8085 processor.
Memory Interfacing.
I/O Interfacing.
Memory Interfacing:
While executing an instruction, there is a necessity for the microprocessor to access memory frequently for reading various instruction codes and data stored in the memory. The interfacing circuit aids in accessing the memory.
Memory requires some signals to read from and write to registers. Similarly the microprocessor transmits some signals for reading or writing a data.
But what is the purpose of interfacing circuit here?
The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip.
The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip.
I/O Interfacing:
We know that keyboard and Displays are used as communication channel with outside world. So it is necessary that we interface keyboard and displays with the microprocessor. This is called I/O interfacing. In this type of interfacing we use latches and buffers for interfacing the keyboards and displays with the microprocessor.
But the main disadvantage with this interfacing is that the microprocessor can perform only one function. It functions as an input device if it is connected to buffer and as an output device if it is connected to latch. Thus the capability is very limited in this type of interfacing.
How do APIs and IoT relate? The answer is not as simple as merely adding an API on top of a dumb device, but rather about understanding the architectural patterns for implementing an IoT fabric. There are typically two or three trends:
Exposing the device to a management framework
Exposing that management framework to a business centric logic
Exposing that business layer and data to end users.
This last trend is the IoT stack, which involves a new shift in the separation of what stuff happens, where data lives and where the interface lies. For instance, it's a mix of architectural styles between cloud, APIs and native hardware/software configurations.
After reading this slide one can understand the serial data communication protocol RS-232 definition,standard,pin configuration,handshaking,advantages and disadvantages .
INTRODUCTION
We know that a microprocessor is the CPU of a computer. A microprocessor can perform some operation on a data and give the output. But to perform the operation we need an input to enter the data and an output to display the results of the operation. So we are using a keyboard and monitor as Input and output along with the processor. Microprocessors engineering involves a lot of other concepts and we also interface memory elements like ROM, EPROM to access the memory.
Types of Interfacing
There are two types of interfacing in context of the 8085 processor.
Memory Interfacing.
I/O Interfacing.
Memory Interfacing:
While executing an instruction, there is a necessity for the microprocessor to access memory frequently for reading various instruction codes and data stored in the memory. The interfacing circuit aids in accessing the memory.
Memory requires some signals to read from and write to registers. Similarly the microprocessor transmits some signals for reading or writing a data.
But what is the purpose of interfacing circuit here?
The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip.
The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip.
I/O Interfacing:
We know that keyboard and Displays are used as communication channel with outside world. So it is necessary that we interface keyboard and displays with the microprocessor. This is called I/O interfacing. In this type of interfacing we use latches and buffers for interfacing the keyboards and displays with the microprocessor.
But the main disadvantage with this interfacing is that the microprocessor can perform only one function. It functions as an input device if it is connected to buffer and as an output device if it is connected to latch. Thus the capability is very limited in this type of interfacing.
How do APIs and IoT relate? The answer is not as simple as merely adding an API on top of a dumb device, but rather about understanding the architectural patterns for implementing an IoT fabric. There are typically two or three trends:
Exposing the device to a management framework
Exposing that management framework to a business centric logic
Exposing that business layer and data to end users.
This last trend is the IoT stack, which involves a new shift in the separation of what stuff happens, where data lives and where the interface lies. For instance, it's a mix of architectural styles between cloud, APIs and native hardware/software configurations.
After reading this slide one can understand the serial data communication protocol RS-232 definition,standard,pin configuration,handshaking,advantages and disadvantages .
Computer Architecture and Organization.pptxLearnersCoach
Computer architecture is the definition of basic attributes of hardware components and their interconnections, in order to achieve certain specified goals in terms of functions and performance. Computer Architecture refers to those attributes of a system that have a direct impact on the logical execution of a program. Examples:
- the instruction set
- the number of bits used to represent various data types
- I/O mechanisms
- memory addressing techniques
Read More: https://www.learnerscoach.co.ke/introduction-to-computer-architecture/
Computer organization: the design and physical arrangement of various hardware units to work in tandem, in a orderly manner, in order to achieve the goals specified in the architecture.
Read More: https://www.learnerscoach.co.ke/introduction-to-computer-architecture-part2/
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
Communication protocols in Embedded Systems. This presentation focused mainly on lower level protocols. Ideal for the beginner to build understanding on these protocols like I2C, USB, SPI etc.
Computer Architecture and Organization.pptxLearnersCoach
Computer architecture is the definition of basic attributes of hardware components and their interconnections, in order to achieve certain specified goals in terms of functions and performance. Computer Architecture refers to those attributes of a system that have a direct impact on the logical execution of a program. Examples:
- the instruction set
- the number of bits used to represent various data types
- I/O mechanisms
- memory addressing techniques
Read More: https://www.learnerscoach.co.ke/introduction-to-computer-architecture/
Computer organization: the design and physical arrangement of various hardware units to work in tandem, in a orderly manner, in order to achieve the goals specified in the architecture.
Read More: https://www.learnerscoach.co.ke/introduction-to-computer-architecture-part2/
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
Communication protocols in Embedded Systems. This presentation focused mainly on lower level protocols. Ideal for the beginner to build understanding on these protocols like I2C, USB, SPI etc.
Green IT Amsterdam Region and the Software Improvement Group (SIG) organized the first workshop of the Green Software Community, with as theme 'Green Software Architecture'. For more information, please visit www.greenitamsterdam.nl/greensoftwarecommunity/
This is a presentation by Michuel Ferreira on the results on a green IT awareness survey
RS-232 is a popular communications interface for connecting modems and data acquisition devices (i.e. GPS receivers, electronic balances, data loggers, ...) to computers.
Design and implementation of uart on socIjrdt Journal
Security is primary concern in our day-to-day life. Everyone wants to be as much as secure as possible. The UART (universal asynchronous receiver and transmitter) module provides asynchronous serial communication with external devices such as modems and other computers. The UART can be used to control the process of breaking parallel data from the PC down into serial data that can be transmitted and vice versa for receiving data. The UART allows the devices to communicate without the need to be synchronized. UART is a popular method of serial asynchronous communication. Typically, the UART is connected between a processor and a peripheral. To the processor, the UART appears as an 8-bit read-write parallel port that performs serial-to-parallel conversions for the processor, and vice versa for the peripheral. With the implementation of UART the serial communication is done in high data rate and no interrupts. Baud rate generator provides high data rate and interrupt controller handles all the interrupts. The UART serial communication interface device receives data and converts data from serial to parallel, where as the transmitter performs parallel to serial conversion.
This presentation discusses the Serial Communication features in 8051, the support for UART. It also discusses serial vs parallel communication, simplex, duplex and full-duplex modes, MAX232, RS232 standards
Embedded Communications Protocols UNIT 3PDF.pdfkanyaakiran
1
INDIAN KARTING RACE
2
Imperial Society
of Innovative
Engineers
Presents
INDIAN KARTING RACE (IKR 2018)
3
INDEX
Topic Page Number
Part I – ADMINISTRATIVE RULES
1. Introduction 4-6
2. Registration Requirement 7-9
3. Driver’s Requirement 8
4. Kart Eligibility 9
5. Registration Process and Deadlines 10-12
Part II – JUDGING CRITERIA
1. Pre Virtual Round 13
2. Virtual Round 13-16
3. College level Technical Inspection 16
4. Deadline and Penalties 16
5. Web based Submission 16
6. Event Points 17
7. Award List 18
PART III – TECHNICAL RULES
Vehicle Categories 20
1. Chassis Design Restriction 21-25
2. Wheels and Tyres 25-26
3. Driver’s Compartment 26
4. Steering 28
5. Braking 28-30
6. Power Unit and Transmission 30-32
7. Safety Measurements 33-36
8. Bodyworks 36-37
9. Compulsory Advertisement 37
PART IV – DYNAMIC ROUND
1. Dynamic Round Registration 38
2. Briefings 38
3. Photo Session/ Media 38-39
4. Static Event 39-40
5. Dynamic Event 41-43
6. Flags 43-44
PART V – DRIVER’S HANDBOOKS
1. Driver’s Requirement 45
2. Driver’s Equipment 45-46
3. Code of Conduct during event 46-47
4
ADMINISTRATIVE RULEBOOK
1. Introduction:
1.1. About ISIE:
Imperial Society of Innovative Engineers are well known Society of India for organizing
Motorsports events, live projects based Industrial Training and Research and publication.
ISIE – India provides a platform to the students and professionals for development and
enhancement of their technical as well as managerial skills. We are developing platform
especially for engineering students where they can easily face real-time engineering
problems and find the best solution, especially in the sector of Electric and Hybrid Vehicles.
ISIE - India is the India’s best platform for the engineering students to develop practical
skills. We believe in “Learning, Implementation, and Sharing”. The Society has a very strong
placement and consultancy wing that has an excellent network of the top companies.
Our core competencies include effective personalized industry based training and excellent
placements. ISIE is committed to the development in the field of renewable source of
energy; these are the best solution to save our environment and development of our
country. We are organizing Hybrid and Go Kart National and International event.
Our Accreditations:
Federation of Motor Sports Club of India (FMSCI) –
The FMSCI is recognized by the Government of India, Ministry of Youth Affairs and Sports as
the only National Sports Federation (NSF) for the promotion and governance of motorsports
in India. The FMSCI is also a long-standing member of the International Federations for
motorsports viz. Federation International de l' Automobile (FIA), Paris (four wheelers and
above) and Federation International de Motocyclisme (FIM), Geneva (2 and 3 wheeler
motorsports).
The FMSCI is also a member of the Indian Olympic Association. The FMSCI has a wide base
of affiliated member clubs spread across India.
ISO 9001:2008:
ISIE Awarded ISO 9001:2008 certifica
Serial Communication Interface with Error Detectioniosrjce
UART is used for serial data communication. UART is a piece of computer hardware that translates
between parallel bits of data and serial bits. UART is usually an integrated circuit used for serial
communications over a computer or peripheral device serial port. Bits have to be moved from one place to
another using wires or some other medium. Over many miles, the expense of the wires becomes large. To reduce
the expense of long communication links carrying several bits in parallel, data bits are sent sequentially. Errors
may occur either internally or externally while we transmit information from source to destination. The errors
generated during the transmission would affect the performance of the overall system. In order to reduce the
errors we should incorporate any error detecting schemes like hamming decoder, check parity systems etc.
Different serial communication devices are available.
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...IJERA Editor
A UART (Universal Asynchronous Receiver and Transmitter) is a device allowing the reception and transmission of information, in a serial and asynchronous way. This project focuses on the implementation of UART with status register using multi bit flip-flop and comparing it with UART with status register using single bit flip-flops. During the reception of data, status register indicates parity error, framing error, overrun error and break error. The multi bit flip-flop is indicated in this status register. In modern very large scale integrated circuits, Power reduction and area reduction has become a vital design goal for sophisticated design applications. So in this project the power consumed and area occupied by both multi-bit flip-flop and single bit flip is compared. The underlying idea behind multi-bit flip-flop method is to eliminate total inverter number by sharing the inverters in the flip-flops. Based on the elimination feature of redundant inverters in merging single bit flip-flops into multi bit flip-flops, gives reduction of wired length and this result in reduction of power consumption and area.
Implementation of UART with Status Register using Multi Bit Flip-FlopIJMER
A UART (Universal Asynchronous Receiver and Transmitter) is a device allowing the
reception and transmission of information, in a serial and asynchronous way. This project focuses on
the implementation of UART with status register using multi bit flip-flop. During the reception of data,
status register indicates parity error, framing error, overrun error and break error.In modern very large
scale integrated circuits, Power reduction and area reduction has become a vital design goal for
sophisticated design applications. Multi-bit flip-flop is an effective power saving implementation
methodology by merging single bit flip-flops in the design. The underlying idea behind multi-bit flip-flop
method is to eliminate total inverter number by sharing the inverters in the flip-flops. Based on the
elimination feature of redundant inverters in merging single bit flip-flops into multi bit flip-flops, gives
reduction of wired length and this result in reduction of power consumption and area
Hands On Data Communications, Networking and TCP/IP TroubleshootingLiving Online
More and more people who work in plants need to understand how data from the field is transmitted to the control room and even to Manufacturing Execution Systems located in head offices situated considerable distances from the plant. It is a technological marvel and this manual helps you to understand the flow of information and the various techniques involved in it.
MORE INFORMATION: http://www.idc-online.com/content/hands-data-communications-networking-and-tcpip-troubleshooting-30?id=37
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
(CNN)s, to adversarial attacks and presents a proactive training technique designed to counter them. We
introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
accuracy improvements over previous techniques. The results indicate that the combination of the volumetric
input and curriculum learning holds significant promise for mitigating adversarial attacks without necessitating
adversary training.
TECHNICAL TRAINING MANUAL GENERAL FAMILIARIZATION COURSEDuvanRamosGarzon1
AIRCRAFT GENERAL
The Single Aisle is the most advanced family aircraft in service today, with fly-by-wire flight controls.
The A318, A319, A320 and A321 are twin-engine subsonic medium range aircraft.
The family offers a choice of engines
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Vaccine management system project report documentation..pdfKamal Acharya
The Division of Vaccine and Immunization is facing increasing difficulty monitoring vaccines and other commodities distribution once they have been distributed from the national stores. With the introduction of new vaccines, more challenges have been anticipated with this additions posing serious threat to the already over strained vaccine supply chain system in Kenya.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Automobile Management System Project Report.pdfKamal Acharya
The proposed project is developed to manage the automobile in the automobile dealer company. The main module in this project is login, automobile management, customer management, sales, complaints and reports. The first module is the login. The automobile showroom owner should login to the project for usage. The username and password are verified and if it is correct, next form opens. If the username and password are not correct, it shows the error message.
When a customer search for a automobile, if the automobile is available, they will be taken to a page that shows the details of the automobile including automobile name, automobile ID, quantity, price etc. “Automobile Management System” is useful for maintaining automobiles, customers effectively and hence helps for establishing good relation between customer and automobile organization. It contains various customized modules for effectively maintaining automobiles and stock information accurately and safely.
When the automobile is sold to the customer, stock will be reduced automatically. When a new purchase is made, stock will be increased automatically. While selecting automobiles for sale, the proposed software will automatically check for total number of available stock of that particular item, if the total stock of that particular item is less than 5, software will notify the user to purchase the particular item.
Also when the user tries to sale items which are not in stock, the system will prompt the user that the stock is not enough. Customers of this system can search for a automobile; can purchase a automobile easily by selecting fast. On the other hand the stock of automobiles can be maintained perfectly by the automobile shop manager overcoming the drawbacks of existing system.
2. DATA COMMUNICATION TYPES
SYNCHRONOUS AND ASYNCHRONOUS
TRANSMISSION
SERIAL COMMUNICATION IMPLEMENTATION
TERMS USED IN SERIAL COMMUNICATION
UART
USART
USB
BIBLIOGRAPHY
5. In parallel transmission, all the bits of data
are transmitted simultaneously on separate
communication lines.
Parallel transmission is used for short
distance communication.
In order to transmit n bit , n wires or lines
are used.
More costly.
Faster than serial transmission.
Data can be transmitted in less time.
6. Many lines of communication, synchronized
bursts of data
Time
Transmitter Receiver
FIG.2
7. Bit by bit transmission of information in series
A B
Travels in series
FIG.3
8. One line of communication, long string of
data
Time
Signal
9. In serial transmission , the various bits of
data are transmitted serially one after the
other.
It requires only one communication line
rather than n lines to transmit data from
sender to receiver.
Thus all the bits of data are transmitted
on single lines in serial fashion.
Less costly.
Long distance transmission.
10. Data sent at one time multiple bytes.
Start and stop bit not used.
Gap between data units not present.
Data transmission speed fast.
Cost high.
Transfer of data between two computer.
Synchronization between sender and
receiver required.
11. Sends only one character at a time (one byte
of data at a time)
Synchronize two devices using Start Bit and
Stop Bit.
Start bit refers to the start of the data.
Usually 0 is used for start bit.
Stop bit indicates the end of data.more than
one bit can be used for end.
12. Popular implementation is known as the
RS-232 serial connection found in
microcomputers
Newer type of serial connections
◦ Universal Serial Bus (USB)
◦ IEEE 1394 serial connection that is also dubbed as
the Fire Wire connection
13. The most popular standard
Conforming serial ports
◦ Micro
◦ Minis and mainframes
Sometimes these ports are also known as
the asynchronous ports
It is also possible to conduct synchronous
transmission through these ports as well
17. Big Endian- MSB first, less significant bytes in
descending order
Little Endian- MSB last, data in ascending
order
Endian type determines how the data is
interpreted, and how it should be sent in both
serial and parallel communication.
18. As cable lengths increase, signal quality
degrades
As data transfer speed increases, signal
quality degrades much faster for increasing
length
TABLE-1
19. Number of possible on/off switches per
second, based on the clock.
Faster clock, faster bit rate
Standard bit rates
Some typical bit rates
FIG.7
20. Number of actual data bits per second
Different from Bit Rate because of required
setup bits per word transmitted.
22. ◦ SCCR1 : Serial Communication Interface Control
Register 1
◦ R8 : Receive data bit 8
◦ T8 : Transmit data bit 8
◦ M : SCI character length bit
◦ WAKE : Wakeup method select bit
◦ Bits 0 - 2 & 5 are not used (always 0)
01234567
Read:
Write:
R8
T8 M Wake
0 0 0 0
23. SCCR2 : Serial Communication Control Register 2
TIE : Transmit interrupt enable bit
TCIE : Transmit complete interrupt enable bit
RIE : Receive interrupt enable bit
ILIE : Idle-line interrupt enable bit
TE : Transmit enable bit
RE : Receive enable bit
RWU : Receiver wakeup bit
SBK : Send break bit
01234567
Read:
Write:
RWU SBKTIE TETCIE RIE ILIE RE
24. SCI status register
◦ TDRE : Transmit data register empty bit
◦ TC : Transmit complete bit
◦ RDRF : Receive data register full bit
◦ IDLE : Idle-line detect bit
◦ OR : Overrun error bit
◦ NF : Noise flag
◦ FE : Framing Error bit
◦ Bit 0 is not used (always 0)
01234567
Read:
Write:
TDRE TC RDRF IDLE OR NF FE 0
25. SCI data register
◦ Two separate registers, same address
◦ Used to Read the Received data
◦ Used to Write the Transmit data
◦ R7 - R0 – Read bits
◦ T7 - T0 – Write bits
01234567
Read:
Write:
R7 R6 R5 R4 R3 R2 R1 R0
T7 T6 T5 T4 T3 T2 T1 T0
26.
27. UART (pronounced “You Art”) is an industry acronym
that stands for Universal Asynchronous Receiver
Transmitter. It is the interface circuitry between the
microprocessor and the serial port. This circuitry is
built in to the 8051 microcontroller.
The UART is responsible for breaking apart bytes of
data and transmitting it one bit at a time (i.e. serially).
Likewise, the UART receives serialized bits and
converts them back into bytes. In practice, it’s a little
more complicated, but that’s the basic idea.
28. 7-
28
Transmitter (Tx) - converts data from parallel
to serial format
◦ inserts start and stop bits
◦ calculates and inserts parity bit if required
◦ output bit rate is determined by the UART clock
Serial output
Parallel
data
UART Clock from
baud rate generator
Status information
30. 7-
30
◦ synchronises with transmitter using the falling edge of the
start bit.
◦ samples the input data line at a clock rate that is normally a
multiple of baud rate, typically 16 times the baud rate.
◦ reads each bit in middle of bit period (many modern UARTs
use a majority decision of the several samples to determine
the bit value)
◦ removes the start and stop bits, optional calculates and
checks the parity bit. Presents the received data value in
parallel form.
Serial input
Status information
Parallel
data
UART Clock from
baud rate generator
32. Control registers
Transmit
Receive
FIFO control
Status
Interrupt
Interrupt enable
Format control
Baud rate control
7-
32
33. Universal Synchronous Asynchronous
Receiver Transmitter
used to send and receive small packets
(characters) over a serial line
◦ full or half duplex
typically asynchronously
5 – 9 bits of data
2 or 3 framing bits
start bit
1 or 2 stop bits
0 or 1 parity bits
34. Must be agreed on by sender and receiver
before any exchanges can be made
stop bit (1 to 0 transition)
5 – 9 data bits
0 or 1 parity bits (odd or even parity)
1 or 2 stop bits (logic 0)
35. Data input register
Data output register
Control register
◦ speed, data bits, parity, stop bits, start, stop
Status register
◦ data ready, transmitting
interrupts
◦ overflow, underflow, data ready, data sent
36. Remember synchronization is on a character
by character basis
check status
load data register
start transmit
wait for transmission complete status or for
interrupt
repeat
37. poll status register for data ready or wait for
interrupt
read data (save it)
repeat
38.
39. In 1994 a collaborative effort to design a
standard for peripheral devices was made
between Compaq, DEC, IBM, Intel, Microsoft,
NEC, and Nortel.
40. USB 1.0 was released January 1996. It has a
data transfer rate of 12 Mbit/s. However USB
did not become popular until its first revision,
in 1998. This revision featured the ability to
use either 12 Mbit/s(FS) or 1.5 Mbit/s(LS)
depending on the device being used.
41. April 2000, the specifications for USB 2.0 are
released. With a data transfer rate of 480
Mbit/s(HS) this revision was much more
superior than its predecessors. However, just
because this speed is manageable does not
mean that it is often met.