Integrated circuits (ICs) are microscopic arrays of electronic components integrated onto a single chip of semiconductor material. There are several types of ICs based on their structure and fabrication method. Thick and thin film ICs are formed on an insulating substrate using screen printing or vacuum deposition techniques and can contain resistors, capacitors, and inductors but not transistors or diodes. Monolithic ICs integrate all components onto a single silicon wafer using photolithography to diffusively dope regions of the wafer with impurities. Hybrid ICs combine monolithic and thick/thin film fabrication by first forming transistors on a silicon wafer, covering it with an insulating layer, and then adding passive film components and interconnecting them to the underlying

2. Javaria Batool
2007-ag-153
(M-phil 3rd )

3. What is an IC …...??
Integrated circuit, commonly referred to as an IC, is a microscopic array of
electronic circuits and components that has been diffused or implanted onto
the surface of a single crystal, or chip, of semiconducting material such as
silicon.

4. Where ICs are
present…???

5. Microprocessors (MPUs) - act as the
Brains of Computers.

6. Digital Signal Processors (DSPs) -
process signals, such as image

7. Application Specific Integrated
Circuits (ASICs)

8. Types of ICs on basis of
structure
Thin and thick Film ICs
Monolithic ICs
Hybrid ICs

9. Thick and Thin film
ICs…
Both have similar appearance, properties and general
characteristics.
These ICs are form on the surface of the an insulating
substrate such as glass or ceramic material.
Moreover only the resistor capacitor and inductor
can be formed by using thick and thin film technique.

10. What is different between Thick & Thin film ICs
“The essential difference
between thick and thick
film ICs is not their
relative thickness but the
method of depositing the
film”
We look
Same..
??

11. Thin film ICs fabrication
Vacuum evaporation :
 Done in ultra high vacuum
 Thin film of vaporized material is deposited on the glass or ceramic
substrate .Target material is vaporized either by resistance heating or by
electron beam
 Gasses entrapment is negligible because of ultra high vacuum

12. Technique for depositing thin film
Sputter deposition:
 In this method, the target material(cathode) is bombarded by
energetic ions to release atoms.
 These atoms are than condensed on the substrate to form the film.
 Sputtering, unlike evaporation is very well controlled and it is generally
applicable to all material metals, alloy, semiconductors and insulator

13. Thick film ICs fabrication
Silk screen printing technique :
 Devices can be formed by using the masks called screens
 Screens are placed on the substrate and inks (conducting or
insulating materials pastes )are wiped across the screen
 Screens are removed and formulation are fired at high
temperature (about 600◦C) that bounded the inks permanently
with the substrate

14. Fabrication of different
components by thin and thick film
technique
Resister and conductor are formed by varying the width
and thickness of film and by using the material of
different resistivity.
Capacitor are produced by an insulating oxide film
between two conductive films.
Small inductor can be made by depositing a spiral
formation of the film.
Transistor and diode can not formed so these are
externally added and interconnected by wires.

15. Monolithic ICs
Mono is stand for “single”and lithic mean “layer”
All components and their interconnection are formed on a
single wafer called semiconductor substrate

16. Fabrication of Monolithic ICs
Two methods for fabrication
Deposition method
All components are fabricated on n-type or p-type
substrate

17. Epitaxial method
 In “Epitaxial method “a thin layer of n-type is grown over a p-type
substrate and than it used for fabrication of components.
 The Epitaxial technique is better than Diffusion technique as the
components characteristics are improved because of uniformity of
doping in the epitaxial layer.
 The thickness of epitaxial layer is about 15 micrometer

18. How impurities introduced within
wafer
There are two method for the addition of impurities
into substrate
 Thermal Diffusion
 Ion implantation

19. Thermal Diffusion
 The wafer is placed in a furnace at 1200◦c
 introducing a gas containing impurity.
Impurity atoms diffused into the crystal because
their tendency for moving from high to low density
region.

20. Ion implantation
 Impurity ions is accelerated by using electric filed
 Ion implantation provides precise control over the
depth of dopant
 Ion implantation can be done at relatively low
temperature

21. Logic Circuit Design / Layout Design
 A logic circuit diagram is drawn to determine the
electronic circuit required for the requested function.
 Once the logic circuit diagram is complete,
simulations are performed multiple times to test the
circuit’s operation.

22. Photomask Creation
The photo mask is a
copy of the circuit
pattern, drawn on a
glass plate coated with a
metallic film.
The glass plate lets light
pass, but the metallic
film does not.

23. Silicon ingot preparation
 Sand, especially quartz, has high percentages of silicon is the base
ingredient for semiconductor manufacturing.
 silicon is purified in multiple steps to finally reach semiconductor
manufacturing quality and p-type impurity is induced to change electric
characteristics
 A high-purity, single-crystal silicon called "99.999999999% is grown to
form an ingot.
 The ingot is doped with accepter impurity to form p-type substrate

24. Ingot Slicing
The silicon ingot is cut into
thin slices (25mm in diameter
& 200µm in thickness) called
wafer.

25. wafer polishing
These silicon wafers being lapped and
polish to mirror finish serves as substrate to
hundred of ICs.
Advantage of polishing that it remove
scratches that come during cutting

26. Epitaxial growth
 On the high p-type substrate
an n-type silicon layer (about
15µm thick) is grown by
placing the wafer in a furnace at
1200◦c
 Introducing a gas containing
donor impurity.
 The thickness of the epitaxial
layer is depends on the
temperature and time used for
thermal diffusion.
 Epitaxial layer ultimately
become the collector for a
transistor or an element for
diode or a capacitor.

27. Oxidation
The layer of SiO2 is grown over
the epitaxial layer
Si +O2 SiO2
The wafer expose to an oxygen
atmosphere at about 1000◦C
Thickness of layer depends
upon the temperature and the
time for which wafer exposed to
thermal oxidation .

28. Photolithography
When a sample of silicon is covered with silicon dioxide,
the oxide layer act as barrier to the diffusion of
impurities.
 p-n junction can thus formed in selected region by first
covering the sample with layer of oxide and than
removal of oxide layer from selected region (to diffusion
of impurity)
 The selective removal of oxide in the desired area is
performed by the photolithography .

29. Step#1: photoresist coating
 The wafer is coated with
thin layer of light sensitive
material that is photo-
resist
 The photo resist applying
to the centre of wafer.
 The wafer accelerate
rapidly to the speed 3000
RPM that form thin layer
of photo resist over the
surface

30. Step#2: Mask Alignment
The photoresist coated wafer is aligned
with the mask by placing the wafer in mask
aligner

31. Step#3: Exposure to UV light
The wafer surface with mask
exposed to ultra violet light.
 The photo-resist below the
transparent region of photo-
mask polymerized

32. Step#4:Developement
 The wafer is developed (by using chemical
trichloroethylene) to remove un-polymerized
photo-resists.
 After the development, photoresist is left on
the wafer surface in the shape of the mask
pattern.
Photoresist
Polymerized Photoresist

33. Step#5: Etching
"Etching" refers to the physical or chemical etching
of oxide films.
 Uncovered SiO2 is etched by solution of HF.
SiO2
Polymerized Photoresist

34. Step#6:Photoresist Stripping
 The photoresist remaining on the wafer surface
is no longer necessary after etching is complete.
 The polymerized photoresist is stripped by
using the H2SO4
Window for diffusion of impurity

35. Isolation diffusion
After the etching in desired area is doped with p-type impurity that has
following advantages
 By p-type diffusion the n-type epitaxial layer is isolated into islands on which
transistor or some other component is fabricated.
 The P+ result in improve isolation between the different components that form
on same chip

36. Base formation
During the base formation process
a new layer of SiO2 is formed over
the wafer
 The new pattern of opening creating
depending upon the circuit need.
In this opening p-type impurity is
diffused this act as base region for
an transistor and as well as resister or
anode for diode or junction
capacitor.

37. Emitter diffusion
For emitter diffusion again a layer of
SiO2 is formed over entire surface
again new pattern of opening creating
depending upon the circuit need .
In the opening in desired region n-type
impurity is diffused this act as the
emitter for the transistor .

38. Metallization
 Metallization is done and providing
bonding pads around the
circumference of the chip for the
later connection of wires.
 Al is used for metallization
 Al is deposited by vacuum
evaporation technique and etched
for the desired region by using
photolithography.

39. Circuit probing
Each IC on the wafer is
checked electrically for
the proper performance
probes .
 Faulty chips are
marked and discard
after the wafer has been
scribed and broken
down into the individual
chips.

40. Scribing and separating into the
chips
After the circuit probing ,wafer is broken into
the individual chips containing the integrated
circuits. For this purpose, wafer s are first
scribed with a diamond tipped tool and than
separated into the single chip.

41. Mounting and packing
The individual chip is
very small and brittle.
Hence it is soldered
on a gold plate header
trough witch leads are
already connected

42. Summary of
Fabrication

43. Limitation to film & monolithic
ICs
Transistor and diode can not formed by using film
technique
Inductor cannot formed by using monolithic
technique

44. Hybrid ICs
 Such circuits are formed either by
inter-connecting a number of
individual chips or by combination
of monolithic and film ICs.
 In such IC the transistors & diode
are first formed within the silicon
wafer (using monolithic technique).
 which is subsequently covered
with an insulating layer such as
SiO2 .
 Film technique is than employed
to form the resister,inductor)
components on the SiO2 surface.
 Connections are made from film to
monolithic through the windows
cut into the SiO2 layer.

45. Thanks

47. Any question..??