Fundamentals of-ic-chip-manufacturing-win974

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Fundamentals of IC manufacturing
Conference Paper · December 2010
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Fundamentalsof
Chipmanufacturing
SureshBiligiri
CMO & CBDO
suresh@svsgconsulting.com
408-497-4498
December 14, 2010 Rev-1 Suresh Biligiri

Contents
1. What is an Integrated Circuits (IC)
2. Brief History of IC
3. Overview of IC
4. How big is a nanometer
5. What does a wafer and IC look like
6. IC Manufacturing outline
7. Sand to Silicon, IC fabrication outline
8. A view of a leading edge wafer fab
9. Basics of Wafer processing
1. Oxidation & Resist coating
2. Lithography
3. Develop & Etch
4. Summary
10. Basics of chip packaging
11. Conclusion
12. Bibliography
December 14, 2010 Suresh Biligiri

Whatis anIntegrated Circuit(IC)
• A collection of electronic devices such as transistors,diodes,
and resistorsthat have been fabricatedand electrically
intraconnectedonto a small flat chip of semiconductor
material
• Silicon (Si) - most widely used semiconductormaterial for ICs,
due to its combination of properties and low cost
• Less common semiconductor materials:germanium (Ge) and
galliumarsenide (GaAs) now in use for certain applications
• Since circuits are fabricatedinto one solid piece of material,
the term solid stateelectronics is used for thesedevices
Source: 2002 John Wiley & Sons, Inc. M. P. Groover, “Fundamentals of Modern Manufacturing”

Brief Historyof IC
• Jack Kilby recorded his initial ideas concerning the integrated circuit in July 1958 and
successfully demonstrated the first working integratedcircuit on September 12, 1958. In
his patent application of February 6, 1959, Kilby described his new device as “a body of
semiconductor material ... wherein all the components of the electronic circuit are
completely integrated.”Kilby won the 2000 Nobel Prize in Physics for his part of the
invention of the integrated circuit.
• The first working integratedcircuit (pictured below) created by Jack Kilby in 1958
contained a single transistor and supporting components on a slice of germanium and
measures 1/16 by 7/16 inches (1.6 x 11.1 mm).
• Robert Noyce also came up with his own idea of an integratedcircuit half a year later
than Kilby. Noyce's chip solved many practical problems that Kilby's had not. Noyce's
chip, made at Fairchild Semiconductor, was made of silicon, whereas Kilby's chip was
made of germanium. Robert Noyce later found intel with others
Source: C:General Tech infoIntegrated circuit - Wikipedia, the free encyclopedia.mht
In comparison, the same size chip today can
hold hundreds of millions of transistors on
the same size chip

Overview ofIC
• An integratedcircuit consistsof hundreds, thousands,
millions (newer chips now can haveover one billion)
microscopicel ectronic devices that havebeen fabricated
and electrically intraconnected on the surface of a silicon
chip
• A chip is a square or rectangular flat piece that is about 0.5
mm (0.020 in) thick and typically 5 to 25 mm (0.2 to 1.0 in)
on a side with transistorof about 100 nanometers(see next
slide)
• Each electronic device (e.g., transistor)on the chip surface
consistsof separatelayers and regions with different
electrical properties combined to perform the particular
electronic function of the device
Source: John Wiley & Sons, Inc. M. P. Groover, “Fundamentals of Modern Manufacturing 2/e” & intel website

How Bigis ananometer
Nowadaysleading -edge transistor circuits are very small and about 100
nanometer(nm) with the wires about 30 nm. The same size chip compared
to the first chip today,holds hundreds of millions of transistors.
Togive perspective of what this is, A nanometer is to a small pebble as a
pebble is to the earths diameter.Even 100 nanometers is
incomprehensibly small, a human hair grows 100 nanometers in 10
seconds
First integrated circuit with one
transistor on left compared to a
newer chip about the same size
(image from wikipedia.com) that
has millions of transistors on it
Source: Wikipedia and Intel web sites

What doesa waferand IClook like
300mm wafer with
circuits processed
on it

IC manufacturingOutline
Source: ASIC Basics, An Introduction to Developing Application Specific IntegratedCircuits by Elaine Rhodes, LuLU Press

Sand toSilicon ICFabrication Outline
• Sand Is melted and purified to 99.999% or better and Si crystal is grown in to ingots
• Ingots are sliced in to thin slices that form the wafer
• Waferslices are polished to a mirror finish for a flat surface to process in to chips
• Polished wafer goes through multiple steps in a wafer fab to form an array of chips on the wafer
• Processed chips on a wafer are tested for functionality on the wafer
• Good chips on the wafer are sliced and packaged in to final IC chips that are used in
Image source: Intel website and www.worldofstock.com

A viewof aleading edgewafer Fab.
Source: intel website

Basics ofwafer processing
Oxidation& ResistCoating
ICs are made out of razor-thin wafersof
silicon (a) etched with hundreds or even
thousands of chips.
First,racks of wafersare rolled into
extremely hot (about 2,000º F) ovens
filled with steam or an oxygen-laden gas.
In effect,the wafersare rusted, covered
with a thin, electrically insulating layerof
silicon dioxide (generally referredto as
oxide) that forestallsshort circuits (b).
Next they are coatedwith a photoresist
(c), an emulsion that reacts to ultraviolet
light only (this is similar to the coating on
the photo film which reacts to light when
exposed in a camera)

Lithography
 Then the first photomask/mask
(D-1) (this has the image of the
circuit that needs to be
printed/imaged on the wafer) is
placed over the wafer,aligned
precisely,and exposed to
ultraviolet light (d).(this step is
comparable to a negative of a
photo (photomask) used to print
on to a photograph paper (wafer).
This process is called Lithography.
(The images shown on the right
illustrates only a portion of a chip
for representation.)
 The light hardens the exposed
resist, while the soft, unexposed
resist- the area that lay beneath
the dark portion of the mask - is
etched away in an acidDark.chrome lines on mask
prevent light from going through
while clear area allows light to
go through exposing the resist
on the wafer
D-1: Photomask/Mask is a 5 or 6
inch square glass material 0.09” to
0.25” thick with a layer of chrome
(like coating on a mirror). Patterns
are etched to the shape desired to
be imaged on a wafer. Often this
image is reduced by 4 or 5 times to
image on wafer

Develop andEtch
 Following the UV exposure step, the unexposed portions of
the photoresist/resist can be removed by a solvent in a
process called developping (e). The type of photoresist
which is initially insoluble and becomes soluble after
exposure to UV light is called positive photoresist.
 Now,the silicon dioxide regions which are not covered by
hardened photoresist (e) can be etched away either by using
a chemical solvent (HF acid) or by using a dry etch (plasma
etch) process. The hardened resist acts as a barrier and only
the exposed area is etched. Note that at the end of this step,
we obtain an oxide window that reaches down to the silicon
surface (f).
 The remaining (unexposed) photoresist can be stripped from
the silicon dioxide surface by using another solvent, leaving
the patterned silicon dioxide feature on the surface, see (g).
 The fabrication of semiconductor devices requires several
such pattern transfers to be performed on silicon dioxide,
polysilicon,and metal. The basic patterning process used in
all fabrication steps, however,is quite similar to the one
shown..

Summary
Compare the unpatterned structure (top) and the
patterned structure (bottom). It took 9 steps to make this
simple hole. Tomake a chip, this entire cycle is repeated as
many as 30 to 40 times depending on the type of chip, with
some variation, substituting step 8 or other with processes to
create different types of devices on the wafer:
1. Oxidize silicon surface
2. Deposit photoresist
3. Anneal photoresist
4. Mount mask above silicon
5. Expose to UV light
6. Develop photoresist
7. Etch photoresist exposed to UV
8. Etch SiO2 through photoresist hole
9. Remove photoresist

Basics ofChip packaging
Packaging
• The wafersafter going through all the processing steps are now
ready to be tested and packaged.
• There are sophisticated systems that test each of the chip/die on
the wafer and identify those that are bad with a dot to prevent
them to be packaged so as to prevent wasted effort.
• All the chips are diced from the wafer and the good dies are then
packaged in to chips of final form
• Toconnect the IC to the outside world, and to protect it from
damage, the chip is attached to a lead frame and encapsulated
inside a suitable package (an enclosure, usually made of plastic or
ceramic, that provides mechanical and environmentalprotection for
the chip) It includes leads by which the IC can be electrically
connected to external circuits

Basics ofChip packaging
Packaging
©2002 John Wiley & Sons, Inc. M. P. Groover,“Fundamentals of Modern Manufacturing 2/e”
Leadframe image from http://images.yourdictionary.com/lead-frame
Packaging of an integrated circuit chip: (a) cutaway view showing the chip
attached to a lead frame and encapsulated in a plastic enclosure, and (b) the
package as it would appear to a user.This type of package is called a dual in-
line package (DIP).
The diced chip is inserted in to the leadframe and the
contacts on chip are connected to the leads for proper
operation. Each chip is later seperated with the leads
after bonding and capsulated
Lead frame is cut
at this point to
separate chips

Conclusion
• Technologyseems tomorph andevolve despite
predictionsof imminentdemise ofpresent
technologies.
• Thereare expectationsof newertechnologies for
makingan ICchip, called ExtremeUltra Violet(EUV)
forsmaller featuresin theorder of22nm and below
comparedto 45nm oftoday’s technology.
• Thesemiconductor deviceis akey componentof
progressand itwill continueto evolveto meetthe
needsof computingpower, formfactor andlower
powerconsumption andgreener technologies

Bibliography &References
 What it takes to build a wafer fab a good view of wafer fab and fabrication technology at a glance
http://www.intel.com/about/companyinfo/museum/index.htm
 For a good illustration of the animation of how a wafer fab operates go to intel link link
http://www.oregonlive.com/news/oregonian/multimedia/wide.ssf?chip
 A good source of IC manufacturing from intel website
http://www.intel.com/Assets/PDF/General/308301003.pdf
 ASIC BASICS: AN INTRODUCTION TO DEVELOPING APPLICATIONSPECIFIC INTEGRATEDCIRCUITS. Copyright
© 2005 by Elaine Rhodes.
 Some images from www.worldofstock.com
 Leadframe image from http://images.yourdictionary.com/lead-frame
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