SlideShare a Scribd company logo
1 of 45
Microelectronic Technology
Dr. Sarmista Sengupta
Asst. Prof., Dept. of ECE
Techno Main Salt Lake
• Microelectronics is a subfield of electronics.
It relates to the study and manufacture (or
microfabrication) of very small electronic
designs and components. Usually, but not
always, this means micrometre-scale or
smaller.
Discrete Component -> Integrated Circuits
Advantages
• coils or inductors cannot be fabricated.
IC Generations
Moore’s Law
Moore’s Law
Classification: Functionally
Classification: Fabrication
• Monolithic IC: The word ‘monolithic’
(‘mono’+’lithos’)means ‘single stone’ or more appropriately
‘a single-solid structure’. All circuit components, active and
passive, are fabricated inseparably within a single
continuous piece of silicon crystalline material called wafer
(or substrate). Transistors, diodes and other passive
components are fabricated at appropriate spots in the
substrate using epitaxial diffusion techniques.
• Thick and Thin Film ICs: These are formed on the
surface of insulating substrate like glass or ceramic
material. Only passive components are formed.
Active elements are added externally (discrete or
monolithic IC).
• Classified not according to their thickness, but
according to processing techniques.
– Thin-film IC: Constructed by depositing films of
conducting material through a mask on the surface.
• Methods: Vacuum evaporation, Cathode sputtering
– Thick-film IC: Silk-screen painting of circuits is
employed. After printing the circuits are high temp.
fired in a furnace to fuse films to the insulating
substrate.
• Hybrid or Multichip IC: Circuits are formed
either by interconnecting a number of
individual chips or by a combination of film
and monolithic IC or by a combination of
discrete component and IC.
IC Terminologies
• Bonding – attachment of wires to an IC
• Chip /Die – an extremely small part of a silicon wafer on
which IC is fabricated
• Circuit probing – to check the proper electrical
performance of each IC with the help of probes
• Diffusion – introduction of controlled small quantities of
material (dopant atoms/ impurities) into the crystal
structure for modifying its electrical characteristics.
• Photoresist – a photo-sensitive emulsion which hardens
when exposed to ultra-violet light.
• Wafer – a thin slice of a semiconductor material generally
circular in shape in which a number of ICs are fabricated
simultaneously.
IC Terminologies….
• Diffusion mask – it is a glass plate with the circuit
pattern drawn on it. Impurities can diffuse through its
transparent areas and not through the opaque ones.
• Encapsulation – putting a cap over the IC and sealing it
in an inert atmosphere.
• Epitaxy – physical placement of materials on a given
surface.
• Etching – chemical removal of surface material from a
chip
• Metallization – providing ohmic contacts and inter-
connections by evaporating aluminium over the chip.
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Silicon
Poly-crystalline
Silicon ore -> Si single crystal
• Polysilicon ore in molten state
– Single crystal preparation
• Czochralski technique (CZ) - this is the dominant
technique for manufacturing single crystals. It is
especially suited for the large wafers that are currently
used in IC fabrication.
• Float zone technique - this is mainly used for small
sized wafers. The float zone technique is used for
producing specialty wafers that have low oxygen
impurity concentration.
Czochralski technique
Chemical Reactions
1. SiC+Si02 = Si + SiO + CO
2. Si + 3HCl = SiHCI3 + H2
3. 2SiHCl3 + 2H2 = 2Si + 6HCl
CZ method -> Si ingot -> Chip
Wafer Size
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Epitaxial Growth
The word epitaxy derives from the Greek prefix epi meaning
“upon” or “over” and taxis meaning “arrangement” or
“order.” The atoms in an epitaxial layer have a particular
registry (or location) relative to the underlying crystal. The
process results in the formation of crystalline thin films that
may be of the same or different chemical composition and
structure as the substrate and may be composed of only
one or, through repeated depositions, many distinct layers.
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Oxidation
Oxidation is a process which converts silicon on the wafer
into silicon dioxide. The chemical reaction of silicon and
oxygen already starts at room temperature but stops after a
very thin native oxide film. For an effective oxidation rate the
wafer must be settled to a furnace with oxygen or water
vapor at elevated temperatures. Silicon dioxide layers are
used as high-quality insulators. The ability of silicon to form
high quality silicon dioxide is an important reason, why
silicon is still the dominating material in IC fabrication.
Need of Oxidation
• It is used for surface passivation which is nothing
but creating protective SiO2 layer on the wafer
surface. It protects the junction from moisture
and other atmospheric contaminants.
• It serves as an insulator on the water surface. Its
high relative dielectric constant, which enables
metal line to pass over the active silicon regions.
• It is used to isolate one device from another.
• It forms capacitor with semiconductor on one
side and metal on the other.
Types of Oxidation
• Dry oxidation has a lower growth rate than wet oxidation although
the oxide film quality is better than the wet oxide film. Therefore
thin oxides such as screen oxide, pad oxide, and especially gate
oxide normally use the dry oxidation process. Dry oxidation also
results in a higher density oxide than that achieved by wet oxide
and so it has a higher breakdown voltage (5 to 10 MV/cm).
Si + O2 SiO2 -----------------DRY OXIDATION
• In case of wet oxidation where water is use instead of oxygen, the
water molecule can dissociate at high temperatures to form
hydroxide OH that can diffuse in the silicon faster than molecular
O2. Therefore the wet oxidation process has a significantly higher
oxidation rate than the dry oxidation. It is used to grow thick oxides
such as masking oxide, blanket field oxide, and the LOCOS oxide.
Si + 2H2O SiO2 + 2H2--------WET OXIDATION
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
What is Lithography?
The word lithography comes from the
Greek lithos, meaning stones,
and graphia, meaning to write. It means
quite literally writing on stones. In the
case of semiconductor lithography (also
called photolithography) our stones are
silicon wafers and our patterns are
written with a light sensitive polymer
called a photoresist. To build the
complex structures that make up a
transistor and the many wires that
connect the millions of transistors of a
circuit, lithography and etch pattern
transfer steps are repeated at least 10
times.
Prebake: Heating for
proper binding of the
resist with the wafer
Mask
Solubility of exposed
photoresist (PR)
increases and dissolves
in appropriate solvent.
The remaining part of
PR remains and protects
the wafer for exposure
to Etch, Implant,
Diffusion etc.
Ultra Violet radiation
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Diffusion
• Diffusion is a process by which atoms move from
a high-concentration region to a low
concentration region. This is very much like a
drop of ink dispersing through a glass of water
except that it occurs much more slowly in solids.
In VLSI fabrication, this is a method to introduce
impurity atoms (dopants) into silicon to change
its resistivity.
• Purpose
– Impurity Doping (Ion implantation is another method)
– Isolation
Ion Implantation
• Ion implantation is another method used to introduce
impurities into the semiconductor crystal. An ion implanter
produces ions of the desired dopant, accelerates them by
an electric field, and allows them to strike the
semiconductor surface. The ions become embedded in the
crystal lattice. The depth of penetration is related to the
energy of the ion beam, which can be controlled by the
accelerating-field voltage. The quantity of ions implanted
can be controlled by varying the beam current (flow of
ions). Since both voltage and current can be accurately
measured and controlled, ion implantation results in
impurity profiles that are much more accurate and
reproducible than can be obtained by diffusion.
Impurity Doping
Comparison of Doping Profiles
Diffusion
Ion-
implantation
Diffusion for isolation
• Isolation between two adjacent transistors in CMOS circuits is necessary
to isolate n channel and p channel transistors in order to avoid the
undesirable parasitic currents between the transistors.
• The method involves producing regions of n- type material surrounded by
p-type material. Components are then fabricated in different n-type wells.
• The p-type material surrounding the wells is given the most negative p
potential with respect to all parts of the wafer, thus each well and hence
component is electrically isolated from the others by back-to-back diodes.
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Metallization
• The purpose of metallization is to
interconnect the various components
(transistors, capacitors, etc.) to form the
desired integrated circuit and to take out
contact leads. Metallization involves the
deposition of a metal over the entire surface
of the silicon. The required interconnection
pattern is then selectively etched. The metal
layer is normally deposited via a sputtering
process.
IC Fabrication
1. Wafer preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5. Isolation diffusion
6. Diffusion (Base/Emitter/Source/Drain etc.)
7. Metallization
8. Circuit probing
9. Scribing and separating into chips
10. Mounting and packing
11. Encapsulation
Packaging
A finished silicon wafer may contain several hundreds of finished circuits or
chips. A chip may contain from 10 to more than 108 transistors; each chip is
rectangular and can be up to tens of millimeters on a side.
• Probing: The circuits are first tested electrically (while still in wafer form)
using an automatic probing station. Bad circuits are marked for later
identification.
• Scribing & separation: The circuits are then separated from each other (by
dicing), and the good circuits (dies) are mounted in packages (headers).
• Interconnect & Packaging: Traditionally, fine gold wires are normally used
to interconnect the pins of the package to the metallization pattern on the
die.
• Encapsulation: Finally, the package is sealed using plastic or epoxy under
vacuum or in an inert atmosphere
Fabrication of components
IC design: Microelectronic Technology.pptx
IC design: Microelectronic Technology.pptx
IC design: Microelectronic Technology.pptx
IC design: Microelectronic Technology.pptx

More Related Content

Similar to IC design: Microelectronic Technology.pptx

integrated circuit febrication
integrated circuit febricationintegrated circuit febrication
integrated circuit febricationsky lark
 
VLSI process integration
VLSI process integrationVLSI process integration
VLSI process integrationneha sharma
 
Processors Manufacturing Technology By Dr Islam Salama.pdf
Processors Manufacturing Technology By Dr Islam Salama.pdfProcessors Manufacturing Technology By Dr Islam Salama.pdf
Processors Manufacturing Technology By Dr Islam Salama.pdfDr-Islam Salama
 
Vlsi assembly technology
Vlsi  assembly technologyVlsi  assembly technology
Vlsi assembly technologyAshu0711
 
Silicon Manufacturing
Silicon ManufacturingSilicon Manufacturing
Silicon ManufacturingAJAL A J
 
Optical Instrumentation 11. Optical Fibre
Optical Instrumentation   11. Optical FibreOptical Instrumentation   11. Optical Fibre
Optical Instrumentation 11. Optical FibreBurdwan University
 
2.ic fabrication
2.ic fabrication2.ic fabrication
2.ic fabricationINDIAN NAVY
 
Chapter 1-IC Fabrication.pptx
Chapter 1-IC Fabrication.pptxChapter 1-IC Fabrication.pptx
Chapter 1-IC Fabrication.pptxKarthik Prof.
 
Monolithic implementation of parasitic elements
Monolithic implementation of parasitic elementsMonolithic implementation of parasitic elements
Monolithic implementation of parasitic elementsGOPICHAND NAGUBOINA
 
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...IJLT EMAS
 
Epitaxy, Epitaxial Growth--ABU SYED KUET
Epitaxy, Epitaxial Growth--ABU SYED KUETEpitaxy, Epitaxial Growth--ABU SYED KUET
Epitaxy, Epitaxial Growth--ABU SYED KUETA. S. M. Jannatul Islam
 

Similar to IC design: Microelectronic Technology.pptx (20)

integrated circuit febrication
integrated circuit febricationintegrated circuit febrication
integrated circuit febrication
 
PPT 2.ppt
PPT 2.pptPPT 2.ppt
PPT 2.ppt
 
Fabrication of IC
Fabrication of ICFabrication of IC
Fabrication of IC
 
04-Epi-SOI.pdf
04-Epi-SOI.pdf04-Epi-SOI.pdf
04-Epi-SOI.pdf
 
VLSI process integration
VLSI process integrationVLSI process integration
VLSI process integration
 
Processors Manufacturing Technology By Dr Islam Salama.pdf
Processors Manufacturing Technology By Dr Islam Salama.pdfProcessors Manufacturing Technology By Dr Islam Salama.pdf
Processors Manufacturing Technology By Dr Islam Salama.pdf
 
Vlsi assembly technology
Vlsi  assembly technologyVlsi  assembly technology
Vlsi assembly technology
 
vlsi fabrication
vlsi fabricationvlsi fabrication
vlsi fabrication
 
Silicon Manufacturing
Silicon ManufacturingSilicon Manufacturing
Silicon Manufacturing
 
Optical Instrumentation 11. Optical Fibre
Optical Instrumentation   11. Optical FibreOptical Instrumentation   11. Optical Fibre
Optical Instrumentation 11. Optical Fibre
 
2.ic fabrication
2.ic fabrication2.ic fabrication
2.ic fabrication
 
Chapter 1-IC Fabrication.pptx
Chapter 1-IC Fabrication.pptxChapter 1-IC Fabrication.pptx
Chapter 1-IC Fabrication.pptx
 
IC Fabrication Process
IC Fabrication ProcessIC Fabrication Process
IC Fabrication Process
 
Module-1.pptx
Module-1.pptxModule-1.pptx
Module-1.pptx
 
Monolithic implementation of parasitic elements
Monolithic implementation of parasitic elementsMonolithic implementation of parasitic elements
Monolithic implementation of parasitic elements
 
Ic fab
Ic fabIc fab
Ic fab
 
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...
Characterization Studies of CdS Nanocrystalline Film Deposited on Teflon Subs...
 
OCN_Unit.1.pptx
OCN_Unit.1.pptxOCN_Unit.1.pptx
OCN_Unit.1.pptx
 
Mems unit 1-lec_2
Mems unit 1-lec_2Mems unit 1-lec_2
Mems unit 1-lec_2
 
Epitaxy, Epitaxial Growth--ABU SYED KUET
Epitaxy, Epitaxial Growth--ABU SYED KUETEpitaxy, Epitaxial Growth--ABU SYED KUET
Epitaxy, Epitaxial Growth--ABU SYED KUET
 

More from SarmistaSengupta1

Fundamentals of Analog and Digital Modulation PPT.pptx
Fundamentals of Analog and Digital  Modulation PPT.pptxFundamentals of Analog and Digital  Modulation PPT.pptx
Fundamentals of Analog and Digital Modulation PPT.pptxSarmistaSengupta1
 
Notes on FIBER OPTICAL COMMUNICATIONS.pdf
Notes on FIBER OPTICAL COMMUNICATIONS.pdfNotes on FIBER OPTICAL COMMUNICATIONS.pdf
Notes on FIBER OPTICAL COMMUNICATIONS.pdfSarmistaSengupta1
 
Fibre Parameters using Variational Formalism.pptx
Fibre Parameters using Variational Formalism.pptxFibre Parameters using Variational Formalism.pptx
Fibre Parameters using Variational Formalism.pptxSarmistaSengupta1
 
Time Base Generators or Sweep Circuits.pptx
Time Base Generators or Sweep Circuits.pptxTime Base Generators or Sweep Circuits.pptx
Time Base Generators or Sweep Circuits.pptxSarmistaSengupta1
 
Working Principle of a Stepper Motor.pptx
Working Principle of a Stepper Motor.pptxWorking Principle of a Stepper Motor.pptx
Working Principle of a Stepper Motor.pptxSarmistaSengupta1
 
Relaxation Oscillator: Schmitt Trigger Circuits.pptx
Relaxation Oscillator: Schmitt Trigger Circuits.pptxRelaxation Oscillator: Schmitt Trigger Circuits.pptx
Relaxation Oscillator: Schmitt Trigger Circuits.pptxSarmistaSengupta1
 
An Introduction to Inverter Circuit.pptx
An Introduction to Inverter Circuit.pptxAn Introduction to Inverter Circuit.pptx
An Introduction to Inverter Circuit.pptxSarmistaSengupta1
 

More from SarmistaSengupta1 (7)

Fundamentals of Analog and Digital Modulation PPT.pptx
Fundamentals of Analog and Digital  Modulation PPT.pptxFundamentals of Analog and Digital  Modulation PPT.pptx
Fundamentals of Analog and Digital Modulation PPT.pptx
 
Notes on FIBER OPTICAL COMMUNICATIONS.pdf
Notes on FIBER OPTICAL COMMUNICATIONS.pdfNotes on FIBER OPTICAL COMMUNICATIONS.pdf
Notes on FIBER OPTICAL COMMUNICATIONS.pdf
 
Fibre Parameters using Variational Formalism.pptx
Fibre Parameters using Variational Formalism.pptxFibre Parameters using Variational Formalism.pptx
Fibre Parameters using Variational Formalism.pptx
 
Time Base Generators or Sweep Circuits.pptx
Time Base Generators or Sweep Circuits.pptxTime Base Generators or Sweep Circuits.pptx
Time Base Generators or Sweep Circuits.pptx
 
Working Principle of a Stepper Motor.pptx
Working Principle of a Stepper Motor.pptxWorking Principle of a Stepper Motor.pptx
Working Principle of a Stepper Motor.pptx
 
Relaxation Oscillator: Schmitt Trigger Circuits.pptx
Relaxation Oscillator: Schmitt Trigger Circuits.pptxRelaxation Oscillator: Schmitt Trigger Circuits.pptx
Relaxation Oscillator: Schmitt Trigger Circuits.pptx
 
An Introduction to Inverter Circuit.pptx
An Introduction to Inverter Circuit.pptxAn Introduction to Inverter Circuit.pptx
An Introduction to Inverter Circuit.pptx
 

Recently uploaded

SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )Tsuyoshi Horigome
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.eptoze12
 
Introduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxIntroduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxvipinkmenon1
 
Current Transformer Drawing and GTP for MSETCL
Current Transformer Drawing and GTP for MSETCLCurrent Transformer Drawing and GTP for MSETCL
Current Transformer Drawing and GTP for MSETCLDeelipZope
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024hassan khalil
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile servicerehmti665
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and usesDevarapalliHaritha
 
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...ranjana rawat
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...Soham Mondal
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVRajaP95
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZTE
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacingjaychoudhary37
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girlsssuser7cb4ff
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort servicejennyeacort
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024Mark Billinghurst
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfAsst.prof M.Gokilavani
 

Recently uploaded (20)

young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Serviceyoung call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
 
SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
Introduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxIntroduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptx
 
Current Transformer Drawing and GTP for MSETCL
Current Transformer Drawing and GTP for MSETCLCurrent Transformer Drawing and GTP for MSETCL
Current Transformer Drawing and GTP for MSETCL
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile service
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and uses
 
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
 
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacing
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girls
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
 

IC design: Microelectronic Technology.pptx

  • 1. Microelectronic Technology Dr. Sarmista Sengupta Asst. Prof., Dept. of ECE Techno Main Salt Lake
  • 2. • Microelectronics is a subfield of electronics. It relates to the study and manufacture (or microfabrication) of very small electronic designs and components. Usually, but not always, this means micrometre-scale or smaller. Discrete Component -> Integrated Circuits
  • 3. Advantages • coils or inductors cannot be fabricated.
  • 9. • Monolithic IC: The word ‘monolithic’ (‘mono’+’lithos’)means ‘single stone’ or more appropriately ‘a single-solid structure’. All circuit components, active and passive, are fabricated inseparably within a single continuous piece of silicon crystalline material called wafer (or substrate). Transistors, diodes and other passive components are fabricated at appropriate spots in the substrate using epitaxial diffusion techniques.
  • 10. • Thick and Thin Film ICs: These are formed on the surface of insulating substrate like glass or ceramic material. Only passive components are formed. Active elements are added externally (discrete or monolithic IC). • Classified not according to their thickness, but according to processing techniques. – Thin-film IC: Constructed by depositing films of conducting material through a mask on the surface. • Methods: Vacuum evaporation, Cathode sputtering – Thick-film IC: Silk-screen painting of circuits is employed. After printing the circuits are high temp. fired in a furnace to fuse films to the insulating substrate.
  • 11. • Hybrid or Multichip IC: Circuits are formed either by interconnecting a number of individual chips or by a combination of film and monolithic IC or by a combination of discrete component and IC.
  • 12. IC Terminologies • Bonding – attachment of wires to an IC • Chip /Die – an extremely small part of a silicon wafer on which IC is fabricated • Circuit probing – to check the proper electrical performance of each IC with the help of probes • Diffusion – introduction of controlled small quantities of material (dopant atoms/ impurities) into the crystal structure for modifying its electrical characteristics. • Photoresist – a photo-sensitive emulsion which hardens when exposed to ultra-violet light. • Wafer – a thin slice of a semiconductor material generally circular in shape in which a number of ICs are fabricated simultaneously.
  • 13. IC Terminologies…. • Diffusion mask – it is a glass plate with the circuit pattern drawn on it. Impurities can diffuse through its transparent areas and not through the opaque ones. • Encapsulation – putting a cap over the IC and sealing it in an inert atmosphere. • Epitaxy – physical placement of materials on a given surface. • Etching – chemical removal of surface material from a chip • Metallization – providing ohmic contacts and inter- connections by evaporating aluminium over the chip.
  • 14. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 15. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 17. Silicon ore -> Si single crystal • Polysilicon ore in molten state – Single crystal preparation • Czochralski technique (CZ) - this is the dominant technique for manufacturing single crystals. It is especially suited for the large wafers that are currently used in IC fabrication. • Float zone technique - this is mainly used for small sized wafers. The float zone technique is used for producing specialty wafers that have low oxygen impurity concentration.
  • 19. Chemical Reactions 1. SiC+Si02 = Si + SiO + CO 2. Si + 3HCl = SiHCI3 + H2 3. 2SiHCl3 + 2H2 = 2Si + 6HCl
  • 20. CZ method -> Si ingot -> Chip
  • 22. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 23. Epitaxial Growth The word epitaxy derives from the Greek prefix epi meaning “upon” or “over” and taxis meaning “arrangement” or “order.” The atoms in an epitaxial layer have a particular registry (or location) relative to the underlying crystal. The process results in the formation of crystalline thin films that may be of the same or different chemical composition and structure as the substrate and may be composed of only one or, through repeated depositions, many distinct layers.
  • 24. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 25. Oxidation Oxidation is a process which converts silicon on the wafer into silicon dioxide. The chemical reaction of silicon and oxygen already starts at room temperature but stops after a very thin native oxide film. For an effective oxidation rate the wafer must be settled to a furnace with oxygen or water vapor at elevated temperatures. Silicon dioxide layers are used as high-quality insulators. The ability of silicon to form high quality silicon dioxide is an important reason, why silicon is still the dominating material in IC fabrication.
  • 26. Need of Oxidation • It is used for surface passivation which is nothing but creating protective SiO2 layer on the wafer surface. It protects the junction from moisture and other atmospheric contaminants. • It serves as an insulator on the water surface. Its high relative dielectric constant, which enables metal line to pass over the active silicon regions. • It is used to isolate one device from another. • It forms capacitor with semiconductor on one side and metal on the other.
  • 27. Types of Oxidation • Dry oxidation has a lower growth rate than wet oxidation although the oxide film quality is better than the wet oxide film. Therefore thin oxides such as screen oxide, pad oxide, and especially gate oxide normally use the dry oxidation process. Dry oxidation also results in a higher density oxide than that achieved by wet oxide and so it has a higher breakdown voltage (5 to 10 MV/cm). Si + O2 SiO2 -----------------DRY OXIDATION • In case of wet oxidation where water is use instead of oxygen, the water molecule can dissociate at high temperatures to form hydroxide OH that can diffuse in the silicon faster than molecular O2. Therefore the wet oxidation process has a significantly higher oxidation rate than the dry oxidation. It is used to grow thick oxides such as masking oxide, blanket field oxide, and the LOCOS oxide. Si + 2H2O SiO2 + 2H2--------WET OXIDATION
  • 28. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 29. What is Lithography? The word lithography comes from the Greek lithos, meaning stones, and graphia, meaning to write. It means quite literally writing on stones. In the case of semiconductor lithography (also called photolithography) our stones are silicon wafers and our patterns are written with a light sensitive polymer called a photoresist. To build the complex structures that make up a transistor and the many wires that connect the millions of transistors of a circuit, lithography and etch pattern transfer steps are repeated at least 10 times.
  • 30. Prebake: Heating for proper binding of the resist with the wafer Mask Solubility of exposed photoresist (PR) increases and dissolves in appropriate solvent. The remaining part of PR remains and protects the wafer for exposure to Etch, Implant, Diffusion etc. Ultra Violet radiation
  • 31. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 32. Diffusion • Diffusion is a process by which atoms move from a high-concentration region to a low concentration region. This is very much like a drop of ink dispersing through a glass of water except that it occurs much more slowly in solids. In VLSI fabrication, this is a method to introduce impurity atoms (dopants) into silicon to change its resistivity. • Purpose – Impurity Doping (Ion implantation is another method) – Isolation
  • 33. Ion Implantation • Ion implantation is another method used to introduce impurities into the semiconductor crystal. An ion implanter produces ions of the desired dopant, accelerates them by an electric field, and allows them to strike the semiconductor surface. The ions become embedded in the crystal lattice. The depth of penetration is related to the energy of the ion beam, which can be controlled by the accelerating-field voltage. The quantity of ions implanted can be controlled by varying the beam current (flow of ions). Since both voltage and current can be accurately measured and controlled, ion implantation results in impurity profiles that are much more accurate and reproducible than can be obtained by diffusion.
  • 35. Comparison of Doping Profiles Diffusion Ion- implantation
  • 36. Diffusion for isolation • Isolation between two adjacent transistors in CMOS circuits is necessary to isolate n channel and p channel transistors in order to avoid the undesirable parasitic currents between the transistors. • The method involves producing regions of n- type material surrounded by p-type material. Components are then fabricated in different n-type wells. • The p-type material surrounding the wells is given the most negative p potential with respect to all parts of the wafer, thus each well and hence component is electrically isolated from the others by back-to-back diodes.
  • 37. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 38. Metallization • The purpose of metallization is to interconnect the various components (transistors, capacitors, etc.) to form the desired integrated circuit and to take out contact leads. Metallization involves the deposition of a metal over the entire surface of the silicon. The required interconnection pattern is then selectively etched. The metal layer is normally deposited via a sputtering process.
  • 39. IC Fabrication 1. Wafer preparation 2. Epitaxial growth 3. Oxidation 4. Photolithography 5. Isolation diffusion 6. Diffusion (Base/Emitter/Source/Drain etc.) 7. Metallization 8. Circuit probing 9. Scribing and separating into chips 10. Mounting and packing 11. Encapsulation
  • 40. Packaging A finished silicon wafer may contain several hundreds of finished circuits or chips. A chip may contain from 10 to more than 108 transistors; each chip is rectangular and can be up to tens of millimeters on a side. • Probing: The circuits are first tested electrically (while still in wafer form) using an automatic probing station. Bad circuits are marked for later identification. • Scribing & separation: The circuits are then separated from each other (by dicing), and the good circuits (dies) are mounted in packages (headers). • Interconnect & Packaging: Traditionally, fine gold wires are normally used to interconnect the pins of the package to the metallization pattern on the die. • Encapsulation: Finally, the package is sealed using plastic or epoxy under vacuum or in an inert atmosphere