Memory Hierarchy (RAM and ROM)


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Memory Hierarchy (RAM and ROM)

  1. 1. Memory Hierarchy
  2. 2. Main Memory • Most of the main memory in a general purpose computer is made up of RAM integrated circuits chips, but a portion of the memory may be constructed with ROM chips • RAM– Random Access memory – Integrated RAM are available in two possible operating modes, Static and Dynamic • ROM– Read Only memory
  3. 3. Random-Access Memory (RAM) • A RAM is a read/write memory in which data can be written into or read from any selected address in any sequence. • When a data is written into a given address, data unit previously stored at that address is replaced by new data unit.
  4. 4. Random-Access Memory (RAM) • When a data unit is read from, data unit remains stored and is not erased. • A RAM is typically used for short term data storage because it cannot retain stored data when power is turned off.
  5. 5. Types of Random-Access Memory(RAM) RAM Static RAM(SRAM) Asynchronous SRAM(ASRAM) Synchronous SRAM with burst feature(SBSRAM) Dynamic RAM(DRAM) Fast Page Mode DRAM(FPM DRAM) Extended Data Out DRAM(EDO DRAM) Burst EDO DRAM(BEDO DRAM) Synchronous DRAM(SDRAM)
  6. 6. Static RAM • All static RAMs are characterized by latch memory cells. • As long as DC power is applied to a static memory cell, it can retain a 1 or 0 state indefinitely. • If power is removed, stored data bit is lost.
  7. 7. Asynchronous Static RAM Operation is not synchronized with system clock.
  8. 8. Synchronous SRAM with burst feature • A synchronous SRAM is synchronized with system clock. • The address, the read/write input, the chip enable, and input data are all latched into their respective registers on an active clock pulse. • Address burst feature allows memory to read or write up to four sequential locations using a single address.
  9. 9. Synchronous SRAM with burst feature
  10. 10. Applications of SRAM • One of the major applications of SRAMs is in cache memory in computers. • Cache memory is a relatively small, high speed memory that stores the most recently used instructions or data from the larger but slower main memory.
  11. 11. Dynamic RAM • Dynamic memory cells store data bits in small capacitors rather than in a latch. • DRAM requires a frequent refresh operation to preserve stored data bit resulting in complex circuitry. • DRAMs use a technique called address multiplexing to reduce number of address lines.
  12. 12. DRAM • Advantage: Allows very large memory arrays to be constructed on a chip at lower cost per bit. • Disadvantage: Storage capacitor cannot hold its charge over an extended period of time and will lose the stored bit unless it is charge is refreshed periodically. To refresh requires additional memory circuitry and complicates the operation of DRAM. • Applications: The major application of DRAM is in main memory of computers. The DRAM consists of transistor and capacitor allowing much greater densities and results in greater bit capacities for given chip area,although much slower access time.
  13. 13. Types of DRAM • Fast Page Mode DRAM(FPM DRAM): i. Idea is based on probability that next several memory address to be accessed are in same row. ii. Saves time over pure random accessing. • Extended Data Out DRAM(EDO DRAM): i. Also called hyper page mode. ii. Next column address can be accessed before external system accepts current valid data. iii. Idea is to speed up access time.
  14. 14. Types of DRAM • Burst Extended Data Out DRAM(BEDO DRAM): i. EDO DRAM with address burst capability. ii. Burst feature allows upto four address to be internally generated from single external address which saves some access time. • Synchronous DRAM: i. Synchronized with system clock. ii. Allows processor to handle other tasks while memory read/write operations are in progress.
  15. 15. Read-Only Memory(ROM) • Contains permanently stored data, which can be read from the memory but cannot be changed. • ROM stores data that are used repeatedly in system applications, such as programmed instructions for system operation. • ROMs retain stored data when power is turned off and are therefore nonvolatile memories.
  16. 16. Internal ROM Organization
  17. 17. Types of ROM ROM Mask ROM Programmable ROM(PROM) Erasable PROM Ultraviolet EPROM Electrically Erasable PROM
  18. 18. Mask ROM • Referred to simply as a ROM. • Permanently programmed during manufacturing process to provide widely used standard functions, such as to provide user specified functions. • Once the memory is programmed, it cannot be changed.
  19. 19. Programmable ROM • PROMs come from manufacturer unprogrammed, and are custom programmed in field to meet user’s need. • Basically same as mask ROM once they are programmed, that is, it cannot be changed. Erasable PROM • Can be reprogrammed. • Uses an NMOSFET array with an isolated gate structure. • Erasure of data bit is a process which removes gate charge.
  20. 20. Ultraviolet EPROM • The isolated gate in FET of UVEPROM is floating within an oxide insulating material. • The programming process causes electrons to be removed from floating gate. • Exposure is done by exposure of memory chip to high intensity UV radiation through UV window on top of package.
  21. 21. Electrically Erasable PROM • Can be both erased and programmed with electrical pulses. • Can be rapidly programmed and erased • Types: Floating gate MOS and Metal nitride oxide silicone(MNOS). • Application of voltage on control gate in floating gate structure permits storage and removal of charge from floating gate.