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STICK DIAGRAM (Part 2/2)
(Euler Graph Approach)
By:
Sudhanshu Janwadkar,
TA, SVNIT (March 10th, 2017)
1. Good Density,
2. Min Area,
3. Single Diffusion Strip In Both Wells,
4. Easy Automation
Advantages
Step 1: Construction Of Logic Graph:
1.Vertices : Nodes of the Network
2.Edge: Represent inputs
3.Dual Graphs for Pull Up Network & Pull Down
Network
Procedure
Procedure:
Step 2: Identification Of Euler Paths:
1.Path through all nodes such that an edge is
visited only once.
2.Uninterrupted diffusion strip in the layout is
possible iff Euler path exists.
3.Many solutions exist.
4.Common Euler path in PUN & PDN
5.Sequence of edges in the Euler path = Order of
I/Ps in the layout.
Procedure:
Procedure:
 Step 3:Ordering of Polysilicon gates
1. Order the Polysilicon (i.e. inputs) according to
the columns in Euler graph sequence => This
results in uninterrupted p-type and n-type
diffusion areas.
 Advantage: Compact area, simple routing of
signals and less parasitic capacitance
Procedure:
Note: As Per our Understanding of Stick Diagram, We represent the various
layers using sticks (Narrow in width) and not as the wide shaded region, as
shown in Figure above. The above diagram is only for Understanding of the
concept, Example covered in the Class may be referred here.
This is NOT a
stick Diagram
in True sense!
 Step 4: Connections
1. Provide the metal connections, according to the
Euler’s Graph to complete the stick diagram
Procedure:
Note: As Per our Understanding of Stick Diagram, We represent the various
layers using sticks (Narrow in width) and not as the such wide shaded regions,
in Figure above. The above diagram is only for Understanding of the concept,
Example covered in the Class may be referred here.
This is NOT a
stick Diagram
in True sense!

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Stick digram by Euler Approach

  • 1. STICK DIAGRAM (Part 2/2) (Euler Graph Approach) By: Sudhanshu Janwadkar, TA, SVNIT (March 10th, 2017)
  • 2. 1. Good Density, 2. Min Area, 3. Single Diffusion Strip In Both Wells, 4. Easy Automation Advantages
  • 3. Step 1: Construction Of Logic Graph: 1.Vertices : Nodes of the Network 2.Edge: Represent inputs 3.Dual Graphs for Pull Up Network & Pull Down Network Procedure
  • 5. Step 2: Identification Of Euler Paths: 1.Path through all nodes such that an edge is visited only once. 2.Uninterrupted diffusion strip in the layout is possible iff Euler path exists. 3.Many solutions exist. 4.Common Euler path in PUN & PDN 5.Sequence of edges in the Euler path = Order of I/Ps in the layout. Procedure:
  • 7.  Step 3:Ordering of Polysilicon gates 1. Order the Polysilicon (i.e. inputs) according to the columns in Euler graph sequence => This results in uninterrupted p-type and n-type diffusion areas.  Advantage: Compact area, simple routing of signals and less parasitic capacitance Procedure:
  • 8. Note: As Per our Understanding of Stick Diagram, We represent the various layers using sticks (Narrow in width) and not as the wide shaded region, as shown in Figure above. The above diagram is only for Understanding of the concept, Example covered in the Class may be referred here. This is NOT a stick Diagram in True sense!
  • 9.  Step 4: Connections 1. Provide the metal connections, according to the Euler’s Graph to complete the stick diagram Procedure:
  • 10. Note: As Per our Understanding of Stick Diagram, We represent the various layers using sticks (Narrow in width) and not as the such wide shaded regions, in Figure above. The above diagram is only for Understanding of the concept, Example covered in the Class may be referred here. This is NOT a stick Diagram in True sense!