This document discusses several digital logic components including adders, decoders, encoders, multiplexers, and demultiplexers. It provides details on half-adders and full-adders which perform addition of binary digits. Decoders and encoders are described as performing the opposite conversion between n-bit inputs and 2n output lines. Multiplexers and demultiplexers are also covered, with multiplexers having several data inputs and one output selected by an input, and demultiplexers reversing this function to distribute data across multiple outputs.

2. Adders
Decoders
Encoders
Multiplexers
Demultiplexers

3. 
The half-adder
accepts two
binary digits on
its inputs and
produces two
binary digits on
its outputs, a
sum bit and a
carry bit.

4. 
The full-adder
accepts two input
bits and an input
carry and
generates a sum
output and an
output carry.

6. In its general form, a decoder has
n input lines to handle n bits and
forms one to 2n output lines to
indicate the presence of one or
more
n-bit combinations.

8. An encoder is a combinational logic ckt that
essentially performs a “reverse” decoder function.
 An encoder accepts an active level on one of its
inputs representing a digit, such as a decimal or
octal digit, and converts it to a coded output such
as BCD or binary.
 Encoders can also be devised to encode various
symbols and alphabetic characters.


9. The basic MUX has several
data i/p lines and a single
o/p line.
m= Selection i/p
n= I/p Lines=2m
In the given example m=2
=> n=22=4

10. A
DEMUX basically reverses the MUX
function.
 It also known as data distributor .