This document describes the design and implementation of a 0-99 digital BCD counter circuit. The circuit uses a 4026 IC and 7-segment displays to display the count. It can operate in two modes - manually using a switch or automatically using a 555 timer as a clock. The circuit was designed, simulated in Proteus, built on a breadboard, and tested to meet the criteria of counting from 0-99 on two displays.

1. SUBMITTED BY:
.
.
M SAIF UL ISLAM
ZUBAIR AHMED
YOUSAF KHAN
BILAL RAFIQUE
.
COMSATS INSTITUTE OF INFORMATION TECHNOLOGY ISLAMABAD
PROJECT REPORT
DLD
In the name of Allah the most Beneficent the most Merciful

2. DIGITAL BCD COUNTER IMPLEMENTATION 1
Table of contents:
Description Page no.
1. Course introduction ………………….………………………………………………………. 02
2. Project Title………………………………..………………………………….……………………03
3. Abstract ………………………………………………………………….…………………………..03
4. Introduction ……………………………………………………………………………….……….04
5. Components used ……………………………………..………………………………………..04
6. Theory …………………………………………………………………………………………………04
6.1. 555 Timer…………………………………………………………………………………04
6.2. 4026 IC …………………………………………………………………………………….05
6.3. 7-seg Display …………………………………………………………………………….08
7. Working ………………………………………………………………………………………………09
7.1. Electric Die ……………………………………………………………….……………..10
8. Circuit Diagram ……………………………………………………………………………………11
9. Software Work ……………………………………………………………………….……………11
10. Bibliography ……………………. ………………………………………….. …………………..12
11. Conclusion …………………………………………………………………………………………..13

3. DIGITAL BCD COUNTER IMPLEMENTATION 2
1. course Introduction:
Course Title:
Digital Logic Design (DLD) EEE241
Instructors:
Theory:
Dr. Riaz Hussain.
Lab:
Ma’am Wajiha Shariq.

4. DIGITAL BCD COUNTER IMPLEMENTATION 3
2. Project title
A simple 0-99 bcd counter
3. Abstract:
In this report, the design and implementation processes of a digital counter circuit are
documented. The initial design criteria for the project were:
1. To have a two digit output
2. To have the circuit count from 0-99
3. To include either an 555 timer or manual counter.
Research was conducted into similar analogue electronic circuits and a suitable starting point
of a digital die was identified. Using this starting point, a digital counter circuit was designed
using BCD 4506 binary counters and 7 segment display outputs. The proposed circuit was
modelled using Proteus, showing that the concepts used in the design were sound. The circuit
was then implemented and tested on breadboard. There are two modes for operation of
circuit:
1. Through manual switch which increments on its push.
2. Through a 555 clock which increments automatically.

5. DIGITAL BCD COUNTER IMPLEMENTATION 4
4. Introduction :
In our normal practical life, we may face circumstances where we need a digital event counter
in order to count certain events. Here I will give you some examples: people counter circuit in
an auditorium, to count the number of products in a go down, to calculate an athlete’s
performance and above all, all the digital clocks are basically counter circuits which generates
an one second clock. And there are much more applications/needs of counters in our daily life.
The uses of counters are the main point which encourage us to implement the digital counter.
So we select this project.
5. Components Required:
 IC 4026
 555 timer
 Resistors
 7-segment display(cc)
 Bread board
 Connecting wires
6. Theory:
In this section of report a brief description of each component used in our project is
documented.
6.1. 555 timer:
555 timers are integrated timing circuits which are used commonly as a source of clock pulses
to drive subsequent timer circuits. They are analogue devices which can produce an oscillating
and digital output. The IC can be configured to give an astable, period output or a monostable,
single triggered output.
In the project circuit, the astable configuration is implemented. A square wave output is
generated with the configuration shown below, mainly by the use of an external capacitor
charging and discharging. Comparator circuits internal to the timer, compare the supply voltage
and capacitor charge to produce either a HIGH or LOW switching output. The duty cycle and
frequency of the output pulses can be set using external resistors and a capacitor.

6. DIGITAL BCD COUNTER IMPLEMENTATION 5
Frequency, f = 1.44/[(R1+R2)C]
Duty cycle = [(R1+R2)/(R1+2R2)]x 100%

7. DIGITAL BCD COUNTER IMPLEMENTATION 6
6.2. 4026 IC:
It is very useful IC because the counter and decoder both actions are implemented in same IC.
The 4026 IC is a 16-pin CMOS seven-segment counter from the 4000 series. It counts clock
pulses and returns the output in a form which can be displayed on a seven-segment display.
This avoids using a binary-coded decimal to seven-segment decoder, but it can only be used to
display the (decimal) digits 0-9.

8. DIGITAL BCD COUNTER IMPLEMENTATION 7
Pin-out:
Pin
number
Name Purpose
1 CLK Clock in
2 CI Clock inhibit - when low, clock pulses increment the seven-segment
3 DE
Display enable - the chip outputs to the seven-segment when this is high (i.e.
when it is low, the seven-segment is off) - useful to conserve battery life, for
instance
4 DEO Display enable out - for chaining 4026s
5 CO
Carry out output - Is high when changing from 9 to 0. It provides an output at
1/10 of the clock frequency, to drive the clock input of another 4026 to provide
multi-digit counting.
6 F Output for the seven-segment's F input
7 G Output for the seven-segment's G input
8 VDD The connection to the 0 V rail
9 D Output for the seven-segment's D input
10 A Output for the seven-segment's A input
11 E Output for the seven-segment's E input
12 B Output for the seven-segment's B input
13 C Output for the seven-segment's C input
14 UCS
Ungated C-segment - an output for the seven-segment's C input which is not
affected by the DE input. This output is high unless the count is 2, when it goes
low.
15 RST Reset - resets all outputs to low when taken high
16 VSS The connection to the +9 V rail

9. DIGITAL BCD COUNTER IMPLEMENTATION 8
6.3. Seven segment display:
Seven segment displays are an arrangement of LEDs that simply accept a digital input to display a digit
from 0 to 9. The digits are made up of seven individually illuminated slots to display the digits. The
display can also illuminate a decimal point. Seven segment displays are one of the oldest electronic
methods for displaying numeric information but also one of the simplest.
There are two types of seven segment displays, common cathode and common anode displays. In a
common cathode display, the cathodes of the LEDs are joined together and the individual segments
illuminated by HIGH voltages. In a common anode display, the anodes of the LEDs are joined together
and the individual segments illuminated by LOW voltages. In this project, common cathode seven
segment displays were used, with the joined cathode connected to ground.
Figure 4: Common Cathode Display Layout and Corresponding Pin
Numbers Segment
Pin number
a 7
b 6
c 4
d 2
e 1
f 9
g 10
GND 3,8
Decimal point (DP) 5

10. DIGITAL BCD COUNTER IMPLEMENTATION 9
7. Working of Digital Counter Circuit:
IC 4026 is basically a decade counter (10 States – counts 0 through 9). Also it has an
In built 7 segment display driver which makes interfacing of 7 segment display easily.
4026 drives only common cathode seven segment displays. As the name indicating a
common cathode seven segment display has its cathode shorted and grounded.
Pin 1 is the Clock input and Pin 2 is the clock inhibit which is used for disabling the clock. It
can be used to pause the counting when desired.
Pin 15 (Master reset pin) helps to reset the counter. Pin 2 and 15 are active high, so we
are grounding them to enable the counting process. They should be connected to Vcc for
their respective actions
.
Pin 3 is display enable pin which enables the display.
Pin 5 is the carry output pin which generates a carry each time the count exceeds 9. It is
used for extending the counting limit by connecting to the next IC’s clock pin.
You can use a 555 astable multivibrator as clock input.
For 2 digit display digital counter circuit 0 to 99 connect the carry out of the first IC as the
clock of 2nd IC as seen below. You can increase the digits as much as you want by
repeating the process with more ICs and displays.

11. DIGITAL BCD COUNTER IMPLEMENTATION 10
7.1. Digital die:

12. DIGITAL BCD COUNTER IMPLEMENTATION 11
8. Circuit diagram:
9. Software work:
The whole circuit was implemented on proteus to check the validity of logic. The result was
positive the circuit run correctly, showing that the logic used for the construction of
counter is perfect.
The screen shot of work is shown below:

13. DIGITAL BCD COUNTER IMPLEMENTATION 12
Here we can can also introduce a reset button through pin 15 whose high value reset the
display to 0. In normal condition the pin 15 will remain at low.
10. Bibliography :
 Unknown, Interfacing to 7-Segment Numeric Displays, Unknown. Retrieved on
14/10/06 from http://www.thelearningpit.com/lp/doc/7seg/7seg.html
 http://en.wikipedia.org/wiki/4000_series#4026_counter_and_display_decoder
 http://www.circuitsgallery.com/2013/12/4026-digital-counter-circuit.html
 http://www.google.com/images
 http://mrwhatis.net/ic-4026.html

14. DIGITAL BCD COUNTER IMPLEMENTATION 13
11.Conclusion :
Analogue electronics components were investigated and a 555 timer, BCD decade(4026) and a
seven segment display were combined to form a digital timer circuit. Different methods were
analysed to determine the best technique for creating an efficient counter until one was chosen
and the circuit was designed. The chosen circuit was verified through simulation using Proteus.
This design was then implemented and modified to suit the needs of the project. Problems
were analysed and repaired where necessary until it was concluded that the circuit had met the
design criteria of the project. Once the correct operation of the circuit was verified, a PCB
implementation was designed in order to make the circuit more concise and more accurate.
But due to time restriction PCB will not be made.
We have to work hard will keen devotion to complete this project. Many problems will arise
during the preparation of this project, such conditions also arise during working on project that
we are totally disappointed , but will not lose hope so then by the collaboration of mates and
Blessings of Almighty Allah we got the +ve result.