The Fetch-Execute Cycle
To execute a program you must first load the program and any relevant data
in to the computer’s memory (RAM) from disk.
The program and data is stored in memory until needed by the processor
(the stored program concept).
Main Memory
10101010
11101000
00110001
10100010
11100000
00001000
10100010
11110011
11111000
00110000
Address
Processor
11000000 00000000
11000000 00000001
11000000 00000010
11000000 00000011
11000000 00000100
11000000 00000101
11000000 00000110
11000000 00000111
11000000 00001001
11000000 00001001
The Fetch-Execute Cycle
A program may contain thousands of instructions but the processor can only
execute one instruction at a time.
•The first instruction is fetched from memory in to the processor where it is
decoded and executed.
•Then the second instruction is fetched and then executed and so on until the
program ends.
This is known as the FETCH – EXECUTE CYCLE.
LDA #B5
Processor
Memory Read Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
1. The processor sets up the address bus with the required memory address by
placing it in the MAR
Memory Read Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
2. The control unit activates the read line on the control bus
Memory Read Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
3. The address bus opens the relevant memory location at that address
11110011
Memory Read Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
4. The contents of the memory location are released, sent along the data bus
and into the MDR
11110011
Memory Read Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
5. The data is then decoded and executed
Memory Write Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
1. The processor sets up the address bus with the required memory address by
placing it in the MAR
Memory Write Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
2. The processor sets up the data bus with the value to be stored in memory by
placing it in the MDR
Memory Write Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
3. The control unit activates the write line on the control bus
Memory Write Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
4. The address bus opens the relevant memory location at that address
Memory Write Operation
ALU
Control
Unit
Memory
Data
Register
Memory
Address
RegisterOther
Registers
Processor Main Memory Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
Address Bus
Data Bus
Control Bus
5. The contents of the memory data register are released, sent along the data
bus and into the memory location
11000111

Fetch-execute Cycle