Basic op amp circuits

Engr.Tehseen Ahsan
Lecturer, Electrical Engineering Department
EE-307 Electronic Systems Design
HITEC University Taxila Cantt, Pakistan
Basic Op-Amp Circuits

13-1 Comparators
Operational amplifiers are often used as comparators to compare the amplitude of one voltage with another.
In this application, the op-amp is used in open-loop configuration, with the input voltage on one input and a reference voltage on the other.
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13-1 Comparators Continue…
 Zero-Level Detection
One application of an op-amp used as a comparator is to determine when an input voltage exceeds a certain level.
Figure 13.1 (a) next slide shows a zero-level detector. Notice that the inverting (-) input is grounded to produce a zero-level and that the input signal voltage is applied to the non-inverting (+) input.
The input voltage Vin at the non-inverting (+) input is compared with a reference voltage VREF at the inverting input (VREF = 0V). Since VREF = 0V, this is called a zero-level detector.
Because of the high-open loop voltage gain, a very small difference voltage Vd between the two inputs drives the amplifier into saturation ( non-linear region). 3

Figure 13-1 (b) shows the result of a sinusoidal input voltage applied to the non-inverting (+) input of the zero-level detector. When the sine wave is positive, the output is at its maximum positive level. When the sine wave crosses 0, the amplifier is driven to its opposite state and the output goes to its maximum negative level.
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When Vin> VREF ( Sine wave is positive)
Vd = Vin- VREF
Vd > 0V
Vout = + Vout(max)
When Vin<VREF ( Sine wave is negative)
Vd = Vin- VREF
Vd < 0V
Vout = - Vout(max)
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 Nonzero-Level Detection
A more practical arrangement is shown in figure 13-2 (b) next slide using a voltage divider to set the reference voltage VREF as
Where +V is the positive op-amp dc supply voltage.
The circuit in figure 13-2 (c) next slide uses a zener diode to set the reference voltage (VREF = VZ).
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 Nonzero-Level Detection 7
Most practically used

Voltage – divider Reference ( figure 13-2 (b) )
When Vin> VREF
Vd = Vin- VREF
Vd > 0V
When Vin<VREF
Vd = Vin- VREF
Vd < 0V
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Zener diode sets reference voltage ( figure 13-2 (c) )
When Vin> VZ
Vd = Vin- VZ
Vd > 0V
When Vin< VZ
Vd = Vin- VZ
Vd < 0V
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 Effects of Input Noise on Comparator Operation
In many practical applications, noise (unwanted voltage fluctuations) appears on the input line.
This noise becomes superimposed on the input voltage as shown in figure 13-5 for the case of a sine wave and can cause a comparator to erratically switch output states.
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In order to understand the potential effects of noise voltage, consider a low-frequency sinusoidal voltage applied to the non inverting (+) input of an op-amp comparator used as a zero- level detector as shown in figure 13-6 (a) next slide.
Figure 13-6 (b) next slide shows the input sine wave plus noise and the resulting output.
As we can see when the sine wave approaches 0, the fluctuations due to noise cause the total input to vary above and below 0 several times, thus producing an erratic output voltage.
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 Reducing Noise Effects with Hysteresis
 An erratic output voltage caused by noise on the input occurs because the output voltage switches states several times at the same input voltage level (output voltage switches states several times at + ve half cycle and same for –ve half cycle).
In order to make the comparator less sensitive to noise, a technique called hysteresis with positive feedback can be used.
Hysteresis
There exists a higher reference level i.e., + VREF when input goes from lower to higher value.
There exists a lower reference level i.e., - VREF when the input goes from higher to lower value.
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 The two reference levels are referred to as the upper trigger point (UTP) and lower trigger point (LTP).
This two-level hysteresis is established with a positive feedback arrangement as shown in figure 13-7.
Note that the noninverting (+) input is connected to the a resistive voltage divider such that a portion of the output voltage is fed back to the input. The input signal is applied to inverting input (-) input in this case. 16
This configuration is also called Schmitt Trigger

The basic operation of the comparator with hysteresis is illustrated in figure 13-8 next slide(s). Assume that the output voltage is at its positive maximum + Vout(max). The voltage fed back to the non inverting input is VUTP and is expressed as
When Vin exceeds VUTP , the output voltage drops to its negative maximum, -Vout(max) as shown in part (a). Now the voltage fed back to the non inverting input is VLTP and is expressed as
A comparator with hysteresis is also called Schmitt trigger. The amount of hysteresis can be found as
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 Reducing Noise Effects with Hysteresis 18

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 Output Bounding
In some applications, it is necessary to limit the output voltage levels of a comparator than that provided by the saturated op-amp.
A single zener diode can be used as shown in figure13-10 to limit the output voltage to the zener voltage in one direction and to the forward drop in other. The process of limiting the output is called bounding. 21

 Positive Value Output Bounding
When anode is connected to a negative terminal.
In positive half cycle of output voltage, the zener diode gets reverse- biased and the limits the output voltage to the zener voltage i.e., +VZ
In negative half cycle of output voltage, the zener diode gets forward biased and behaves as a normal conventional diode with a drop of 0.7 V across it ( -0.7 V) . It is shown in figure 13-11 (a) below
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 Negative Value Output Bounding
When cathode is connected to a negative terminal.
In positive half cycle of output voltage, the zener diode gets forward biased and behaves as a normal conventional diode with a drop of 0.7 V across it ( + 0.7 V) .
In negative half cycle of output voltage, the zener diode gets reverse- biased and the limits the output voltage to the zener voltage i.e., it is shown in figure 13-11 (b) below
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 Double Bounded Comparator 24

13-2 Summing Amplifiers
 Summing Amplifier with Unity Gain
A summing amplifier has two or more inputs and its output voltage is proportional to the negative of the algebraic sum of its input voltages.
A two-input summing amplifier is shown in figure 13-20, but any number of inputs can be used.
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13-2 Summing Amplifiers Continue…
 Summing Amplifier with Unity Gain
The operations of the circuit and derivation of the output expression are as follows: 29

 Summing Amplifier with Unity Gain 30

 Summing Amplifier with Gain Greater Than Unity 32

 Averaging Amplifier
Averaging amplifier is a variation of summing amplifier. 34

 Scaling Adder
Scaling Adder is also a variation of summing amplifier. 37

13-3 Integrators and Differentiators
 The Op-Amp Integrator
An ideal integrator is shown in figure 13-31. Notice that the feedback element is a capacitor that forms and RC circuit with the input resistor.
Practical integrators often have an additional resistor Rf in parallel with the feedback capacitor to prevent saturation. However we will consider the ideal integrator for the purpose of our analysis as it does not affect the basic operation. 40

13-3 Integrators and Differentiators Continue…
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 The Op-Amp Differentiator
An ideal differentiator is shown in figure 13-37. Notice how the placement of the capacitor and resistor differ from the integrator. The capacitor is now the input element and resistor is the feedback element. A differentiator produces and output that is proportional to the rate of change of the input voltage.
Practical differentiators may include a series resistor Rin to reduce high frequency noise.
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 The Op-Amp Differentiator
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 The Op-Amp Differentiator 51

 The Op-Amp Differentiator 52

Basic op amp circuits

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