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Radix 4 booth

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Richu Jose Cyriac
Richu Jose Cyriac

This document presents Booth's radix-4 algorithm for performing binary multiplication using an ALU. It explains that Booth's algorithm reduces the number of partial products generated during multiplication by grouping consecutive zeros and ones. It then describes the radix-2 Booth's algorithm and provides an example. The drawbacks of radix-2 are discussed, such as its inefficiency with isolated ones. Next, the radix-4 coding technique is presented and an example is shown. Finally, VHDL simulation code is presented to simulate multiplication using radix-4 algorithm.

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P R E S E N T E D B Y DAVIS OOMMEN ABRAHAM RICHU JOSE CYRIAC BINARY MULTIPLICATION USING BOOTH’S RADIX-4 ALGORITHM MICROELECTRONICS & VLSI DESIGN NIT CALICUT WINTER 2012
WHY BOOTH’S ALGORITHM?  In ALU, only add/subtract/shift operations are possible.  Multiplication involves 2 basic operations - generation of partial products + their accumulation  2 ways to speed up - reducing number of partial products and/or accelerating accumulation  Fewer partial products generated for groups of consecutive 0’s and 1’s in Booth's algorithm
RADIX-2 : AN OVERVIEW ---------------------------------------------------------------------- Xi Xi–1 Yi Explanation ---------------------------------------------------------------------- 0 0 0 No string of 1s in sight 0 1 1 End of string of 1s in x 1 0 -1 Beginning of string of 1s in x 1 1 0 Continuation of string of 1s in x ------------------------------------------------------------------------ EXAMPLE 1 1 0 1 0 1 1 1 0 Operand x 0 -1 1 -1 1 0 0 -1 0 Recoded version y (0) TIP: Yi=Xi-1 -Xi
RADIX-2 : AN EXAMPLE M 0110 +6 X Y 0010(0) +2 Z 0 1 -1 0 RECODED MULTIPLIER ACCUMULATOR Y Yn-1 Z OPERATIONS 0000 0010 0 0 0000 0001 0 -1 SHIFT 1010 1101 0001 0000 0 1 1 A<-A-M SHIFT 0011 0001 0000 1000 1 0 0 A<-A+M SHIFT 0000 1100 0
DRAWBACKS OF RADIX-2 ALGORITHM  Algorithm inefficient with isolated 1's e.g. 001010101(0) recoded as 0 1-1 1-1 1-1 1 - 1, requiring 8 instead of 4 operations
RADIX-4 : CODING TECHNIQUE –––––––––––––––––––––––––––––––––––––––––––––––––––– xi+1 xi xi–1 zi/2 Explanation –––––––––––––––––––––––––––––––––––––––––––––––––––– 0 0 0 0 No string of 1s in sight 0 0 1 1 End of string of 1s 0 1 0 1 Isolated 1 0 1 1 2 End of string of 1s 1 0 0 -2 Beginning of string of 1s 1 0 1 -1 End a string, begin new one 1 1 0 -1 Beginning of string of 1s 1 1 1 0 Continuation of string of 1s –––––––––––––––––––––––––––––––––––––––––––––––––––– Example 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 0 (0) Operand x -2 2 -1 2 -1 -1 0 -2 Radix-4 version z
RADIX 4 : AN EXAMPLE
VHDL SIMULATION VHDL code simulation for the multiplication of two binary numbers A=00010001(17) B=11110111(-9)
CONCLUSION  In radix-4 algorithm , n/2=3 steps are used ie. 2 multiplier bits in each step  All shift operations are 2 bit position shifts  Compared to radix-2 Booth's algorithm - less patterns with more partial products; Smaller increase in number of operations  Algorithms can be extended for higher radices also
THANK YOU
APPENDIX

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Radix 4 booth

  • 1. P R E S E N T E D B Y DAVIS OOMMEN ABRAHAM RICHU JOSE CYRIAC BINARY MULTIPLICATION USING BOOTH’S RADIX-4 ALGORITHM MICROELECTRONICS & VLSI DESIGN NIT CALICUT WINTER 2012
  • 2. WHY BOOTH’S ALGORITHM?  In ALU, only add/subtract/shift operations are possible.  Multiplication involves 2 basic operations - generation of partial products + their accumulation  2 ways to speed up - reducing number of partial products and/or accelerating accumulation  Fewer partial products generated for groups of consecutive 0’s and 1’s in Booth's algorithm
  • 3. RADIX-2 : AN OVERVIEW ---------------------------------------------------------------------- Xi Xi–1 Yi Explanation ---------------------------------------------------------------------- 0 0 0 No string of 1s in sight 0 1 1 End of string of 1s in x 1 0 -1 Beginning of string of 1s in x 1 1 0 Continuation of string of 1s in x ------------------------------------------------------------------------ EXAMPLE 1 1 0 1 0 1 1 1 0 Operand x 0 -1 1 -1 1 0 0 -1 0 Recoded version y (0) TIP: Yi=Xi-1 -Xi
  • 4. RADIX-2 : AN EXAMPLE M 0110 +6 X Y 0010(0) +2 Z 0 1 -1 0 RECODED MULTIPLIER ACCUMULATOR Y Yn-1 Z OPERATIONS 0000 0010 0 0 0000 0001 0 -1 SHIFT 1010 1101 0001 0000 0 1 1 A<-A-M SHIFT 0011 0001 0000 1000 1 0 0 A<-A+M SHIFT 0000 1100 0
  • 5. DRAWBACKS OF RADIX-2 ALGORITHM  Algorithm inefficient with isolated 1's e.g. 001010101(0) recoded as 0 1-1 1-1 1-1 1 - 1, requiring 8 instead of 4 operations
  • 6. RADIX-4 : CODING TECHNIQUE –––––––––––––––––––––––––––––––––––––––––––––––––––– xi+1 xi xi–1 zi/2 Explanation –––––––––––––––––––––––––––––––––––––––––––––––––––– 0 0 0 0 No string of 1s in sight 0 0 1 1 End of string of 1s 0 1 0 1 Isolated 1 0 1 1 2 End of string of 1s 1 0 0 -2 Beginning of string of 1s 1 0 1 -1 End a string, begin new one 1 1 0 -1 Beginning of string of 1s 1 1 1 0 Continuation of string of 1s –––––––––––––––––––––––––––––––––––––––––––––––––––– Example 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 0 (0) Operand x -2 2 -1 2 -1 -1 0 -2 Radix-4 version z
  • 7. RADIX 4 : AN EXAMPLE
  • 8. VHDL SIMULATION VHDL code simulation for the multiplication of two binary numbers A=00010001(17) B=11110111(-9)
  • 9. CONCLUSION  In radix-4 algorithm , n/2=3 steps are used ie. 2 multiplier bits in each step  All shift operations are 2 bit position shifts  Compared to radix-2 Booth's algorithm - less patterns with more partial products; Smaller increase in number of operations  Algorithms can be extended for higher radices also