There are two types of JFET transistors - n-channel and p-channel. The document discusses the characteristics and operation of both types. It also covers various applications of JFETs such as amplifiers, constant current sources, and analog switches. The different classes of amplifiers - Class A, B, AB, and C - are described based on how much of the input signal cycle the output device conducts. Load lines are also discussed as a way to represent the operating points of a transistor on its output characteristics curve.

1. -MUHAMMAD DANISH BIN AHMAD ROSLI
-AMIRUL IRFAN
-HARISS KHAIRI
-SYAHIR ZULKIPLI
-AIMAN AKMAL

2. CHARACTERISTIC OF JFET
There are 2 types of JFET
◦n-channel JFET
◦p-channel JFET

3. SYMBOL
n-channel JFET
Gate
Drain
Source
Gate
Drain
Source
p-channel JFET

4. N channel JFET:
◦ Major structure is n-type material (channel) between embedded p-type
material to form 2 p-n junction.
◦ In the normal operation of an n-channel device, the Drain (D) is positive with
respect to the Source (S). Current flows into the Drain (D), through the
channel, and out of the Source (S)
◦ Because the resistance of the channel depends on the gate-to-source voltage
(VGS), the drain current (ID) is controlled by that voltage

5. N-channel JFET

6. P-channel JFET
P channel JFET:
◦Major structure is p-type material (channel)
between embedded n-type material to form 2 p-
n junction.
◦Current flow : from Source (S) to Drain (D)
◦Holes injected to Source (S) through p-type
channel and flowed to Drain (D)

7. P-channel JFET

9. JFET Characteristic for VGS = 0 V and 0<VDS<|Vp|
To start, suppose VGS=0
Then, when VDS is increased, ID increases. Therefore, ID is proportional to
VDS for small values of VDS
For larger value of VDS, as VDS increases, the depletion layer become
wider, causing the resistance of channel increases.
After the pinch-off voltage (Vp) is reached, the ID becomes nearly constant
(called as ID maximum, IDSS-Drain to Source current with Gate Shorted)

10. JFET for VGS = 0 V and 0<VDS<|Vp|

11. Pinch-off (VGS = 0 V, VDS = VP).

12. ID versus VDS
for VGS = 0 V and 0<VDS<|Vp|

13. JFET for
(Application of a negative voltage to the gate of a JFET)

14. JFET Characteristic Curve
For negative values of VGS, the gate-to-channel junction is reverse biased
even with VDS=0
Thus, the initial channel resistance of channel is higher.
The resistance value is under the control of VGS
If VGS = pinch-off voltage(VP)
The device is in cutoff (VGS=VGS(off) = VP)
The region where ID constant – The saturation/pinch-off region
The region where ID depends on VDS is called the linear/ohmic region

15. OPERATING IF JFET:SATURATING REGION

16. OPERATING OF JFET:OHMIC REGION

18. p-Channel JFET

19. p-Channel JFET characteristics with IDSS = 6
mA and VP = +6 V.

20. Characteristics for n-channel JFET &
p-channel JFET
The behavior of a JFET can be
described in terms of a set of
Characteristic Curves shown here.
In the region shown with a green
background the drain-source
voltage is small and the channel
behaves like a fairly ordinary
conductor. In this region the current
varies roughly in proportion to the
drain-source voltage as if the JFET
obeys Ohm's law. However, as we
increase the drain-source voltage
and move into the region with a
light background we increase the
drain-channel voltage so much that
we start to ‘squeeze down’ the
channel.

22. IV CURVER OF JFET

23. BASICE JFET AMPLIFIER
common source common gatecommon drain
-Each circuit configuration describes a two port network having an input and
an output. The transfer function of each is also determined by the input and
output voltages or currents of the circuit.

24. APPLICATION OF JFET AS
AMPILFIER
Low-Noise Amplifier
Differential Amplifier
Constant Current Source
Analog Switch or Gate
Voltage Controlled Resistor

25. Low-Noise Amplifier
A minor change to the circuit of Figure 3 describes a
basicsingle stage low-noise JFET amplifier. Figure 4
shows that this change only incorporates a resistor
from the gate to Vss. This resistor supplies a path for
the gate leakage current in an AC coupled circuit. Its
value is chosen by the required input impedance of
the amplifier and its desired low-noise characteristics.
The noise components of this amplifier are the thermal
noise of the drain and gate resistors plus the noise
components of the JFET. The noise contribution of the
JFET is from the shot noise of the gate leakage
current, the thermal noise of the channel resistance,
and the frequency noise of the channel. These noise
characteristics are generally lower than those found in
bipolar transistors if the JFET is properly selected for
the application. The voltage gain of the circuit is
again defined by Equation ).

26. Differential Amplifier
Another application of the JFET is the differential
amplifier. This configuration is shown in Figure 5.
The differential amplifier requires that the two
transistors be closely matched electrically and
physically located near each other for thermal
stability. Either input and either output can be used
or both inputs and only one output and conversely
only one input and both outputs can be used. For
the configuration shown the source resistor is
chosen to determine the gate to source bias
voltage, remembering that the current will be twice
that of each of the JFET drain currents. The value
of the drain resistors is chosen to provide a suitable
dynamic range at the output/
The gain of this circuitis defined by:
(5) AV = 2x (gm x Rl) / (1 + gm x RS )
where all the terms in the equation have previously
been defined.

27. Constant Current Source
A constant current source using a JFET is shown in Figure 6. This
circuit configuration has many useful applications ranging from
charging circuits for integrators or timers to replacing the source
resistor in the differential amplifier shown in Figure 5. The current
provided by the constant current source of Figure 6 is defined as
(6) ID = IDSS [ 1 - ( VGS / Vp) ] 2
where ID = the drain current or magnitude of
current sourced
IDSS = the drain saturation current of the JFET
VGS = ID x RS
Vp = the JFET pinch-off voltage
2 = the squared value of the term in brackets.
01/99 H-7
1000

28. Analog Switch or Gate
Figures 7, 8, and 9 show three different applications
for the JFET to be used as an analog switch or gate.
Figures 7 and 8 both demonstrate methods for
realizing programmable gain amplifiers, while
Figure 9 shows an analog multiplexer circuit using
JFETs and a common op-amp integrated circuit.
It can be seen from Figure 7 that the gain of the stage
can be changed by switching in any combination of
feedback resistors R1 through Rn. The JFET in series
with the input resistor should be of the same type
as those in the feedback paths and is used for thermal
stability of the circuit gain. The transfer function
of the circuit of Figure 7 is approximated by:

29. The circuit of Figure 8 shows another method to
realize a programmable gain amplifier using a
common op-amp, four resistors, and only two JFETs.
The gain of this circuit can also be changed by
switching in the desired resistors by turning off the
appropriate JFET thus switching in the parallel
resistor. The transfer function of this circuit is
approximated by:
(8) Vo / Vi = (R3 + R4) / (R1 + R2)

30. It should be noted that only those resistors which are
switched into the circuit are to be included in it should
be noted that only those resistors which the transfer
function equation. Figure 9 shows a circuit in which the
JFETs are acting as analog switches to multiplex
several input signal sources to a single output source.
The transfer function of this circuit is then
approximated by:
(9) Vo / Vi = Rf / Rn
where Rf = the feedback resistor
Rn = any one of the input resistors
Further examination of this circuit shows that it can
also be used as a programmable summing amplifier
by switching in any combination of input signals. The
transfer function is then approximated by:
(10) Vo / Vi = (Rf / R1) + (Rf / R2) + .... + (Rf /Rn)
Again in this application only those resistors which
are switched into the circuit are to be included in the
transfer function equation

31. Voltage Controlled Resistor
Another common application for the JFET is as a
voltage controlled resistor. The JFET action in normal
operation simply changes the cross sectional dimensions
of the channel. When the JFET is biased in the
resistive or linear region as shown in Figure 10, a
change in gate voltage and the corresponding change
in channel dimensions simply changes the drain to
source resistance of the device.

32. TYPES OF AMPLIFIER
•Class A Amplifier
•Class B Amplifier
•Class AB Amplifier
•Class C Amplifier

33. Class AAmplifier
The output device (transistor) conducts electricity
for the entire cycle of input signal. In other words,
they reproduce the entire waveform in its entirety.
These amps run hot, as the transistors in the
power amp are on and running at full power all
the time.
There is no condition where the transistor(s)
is/are turned off. That doesn't mean that the
amplifier is never or can never be turned off; it
means the transistors doing the work inside the
amplifier have a constant flow of electricity
through them. This constant signal is called
"bias".
Class A is the most inefficient of all power
amplifier designs, averaging only around 20.

34. Class B Amplifier
The input signal has to be a lot larger in
order to drive the transistor appropriately.
This is almost the opposite of Class A
operation
There have to be at least two output devices
with this type of amp. This output stage
employs two output devices so that each
side amplifies each half of the waveform. [li
Either both output devices are never allowed
to be on at the same time, or the bias
(remember, that trickle of electricity?) for
each device is set so that current flow in one
output device is zero when not presented
with an input signal.
Each output device is on for exactly one half
of a complete signal cycle

35. Class AB Amplifier
In fact, many Class AB amps operate in Class A
at lower output levels, again giving the best of
both worlds
The output bias is set so that current flows in a
specific output device for more than a half the
signal cycle but less than the entire cycle.
There is enough current flowing through each
device to keep it operating so they respond
instantly to input voltage demands.
In the push-pull output stage, there is some
overlap as each output device assists the other
during the short transition, or crossover period
from the positive to the negative half of the
signal.

36. Class C Amplifier
The Class C Amplifier design has the greatest efficiency but
the poorest linearity of the classes of amplifiers mentioned
here
the class C amplifier is heavily biased so that the output
current is zero for more than one half of an input sinusoidal
signal cycle with the transistor idling at its cut-off point. In
other words, the conduction angle for the transistor is
significantly less than 180 degrees, and is generally around
the 90 degrees area.
this form of transistor biasing gives a much improved
efficiency of around 80% to the amplifier, it introduces a very
heavy distortion of the output signal. Therefore, class C
amplifiers are not suitable for use as audio amplifiers.
class C amplifiers are commonly used in high frequency sine
wave oscillators and certain types of radio frequency
amplifiers, where the pulses of current produced at the
amplifiers output can be converted to complete sine waves of
a particular frequency by the use of LC resonant circuits in its
collector circuit.

37. Amplifier Classes and Efficiency
As well as audio amplifiers there
are a number of high
efficiency Amplifier
Classes relating to switching
amplifier designs that use
different switching techniques to
reduce power loss and increase
efficiency. Some amplifier class
designs listed below use RLC
resonators or multiple power-
supply voltages to reduce power
loss, or are digital DSP (digital
signal processing) type
amplifiers which use pulse width
modulation (PWM) switching
techniques

38. DC LOAD LINE
Consisder a CE amplifier along with the output
characteristics as shown in figure 3.18 above. A straight
line drawn on the output characteristic of a transistor which
gives the various zero signal values (ie. When no signal
applied) of VCE and IC is called DC load line
Construction of DC load line
Applying KVL to the collector circuit we get,
VCC–ICRC –VCE =0-------------------1
VCE = VCC –ICRC ----------------------2
The above equation is the first degree equation and can be
represented by a straight line. This straight line is DC load
line.
To draw the load line we require two end points which can
be found as follows.
If IC =0, equn 2 becomes VCE = VCC
if VCE = 0, equn 2 becomes VCC = ICRC ie. IC = VCC /RC

39. SOURCE
http://www.hifivision.com/amplifiers/174-types-amplifiers-class-class-b-class-ab-class-
d.html
http://www.electronics-tutorials.ws/amplifier/amplifier-classes.html
http://www.futureelectronics.com/en/transistors/jfet-transistor.aspx