The document discusses voltage regulators and digital to analog converters (DACs). It provides details on: 1) How voltage regulators work to keep an output voltage constant by sensing changes and amplifying any difference between the output and a reference voltage. 2) Common types of voltage regulators including fixed voltage 78XX series and adjustable voltage 723 series. 3) Types of DACs including weighted resistor, R-2R ladder, and inverted R-2R ladder; and how their resistor networks convert a digital input to an analog output voltage. 4) How successive approximation and dual slope ADCs work to convert an analog input to digital output using comparison and feedback to approximate or time the input voltage.

1. UNIT III Analog IC Application
voltage regulator is one of the most widely used electronic circuitry in any device. A regulated
voltage (without fluctuations & noise levels) is very important for the smooth functioning of many digital
electronic devices. A common case is with micro controllers, where a smooth regulated input voltage
must be supplied for the micro controller to function smoothly
The resistive voltage divider formed by R2 and R3 senses any change in the output voltage. When the
output tries to decrease, because of a decrease in VIN or because of an increase in IL caused by a decrease
in RL a proportional voltage decrease is applied to the op-amp's inverting input by the voltage divider.
Since the zener diode (D1) holds the other op-amp input at a nearly constant reference voltage, VREF , a
small difference voltage (error voltage) is developed across the op-amp's inputs. This difference voltage is
amplified, and the op-amp's output voltage, VB, increases. This increase is applied to the base of Q1,
causing the emitter voltage VOUT
to increase until the voltage to the
inverting input again equals the
reference (zener) voltage. This
action offsets the attempted
decrease in output voltage. Thus
keeping it nearly constant. The
power transistor, Q1, is usually
used with a heat sink because it
must handle the entire load current. The opposite action occurs when the output tries to increase
http://www.circuitstoday.com/ic-voltage-regulators
Fixed voltage regulators: 78XX series are three
terminal positive fixed voltage regulators. There are
seven voltage regulators with output voltages of 5V,
6V, 8V, 12V, 25V, 18V and 24V. The two digits XX
of 78XX are used to identify the fixed output voltage
of the regulator.

2. 79XX series are negative fixed voltage regulators which are complements to the 78XX series devices. There are
two additional voltage options of - 2V and - 5.2V also available in 79XX series.
The standard circuit connection of
the 78XX monolithic positive voltage
regulator is shown in Fig The input capacitor
Ci is used to cancel the inductive effects due
to long distribution leads and the output
capacitor Co improves the transient response
and acts as a ripple filter also. The standard
circuit connection of the 79XX monolithic negative voltage regulator is shown in Fig
Voltage regulator IC 723
The three terminal regulators 7805,7815,7905,7915 etc are capable of producing only fixed positive or
negative output voltages. More over, such regulator do not have short circuit protection
Important Features of IC 723:
1. It works as voltage regulator at output voltage
ranging from 2 to 37 volts at Currents upto 150
mA.
2. It can be used at load currents greater than
150 mA with use of suitable NPN or PNP
external pass transistors.
3. Input and output short-circuit protection is
provided.
4. It has good line and load regulation (0.03%)
5. Wide variety of applications of series, shunt,
switching and floating regulator.
6. Low temperature drift and high ripple
rejection.

3. 7. Low standby current drain.
8. Small size, lower cost
9. Relative ease with which power supply can be designed.
10. It provides a choice of supply voltage.
Internal Structure of IC 723:
The functional block diagram of IC 723 can be divided into four major blocks
1. Temperature compensated voltage reference source, which is zener diode.
2. An op-amp circuit used as an error amplifier.
3. A series pass transistor capable of a 150 mA output current.
4. Transistor used to limit output current
Temperature compensated zener diode, constant current source and reference amplifier constitutes
the reference element. In order to get a fixed voltage from zener diode, the constant current source forces
the zener to operate at a fixed point.
Output voltage is compared with this temperature compensated reference potential of the order of
7 volts. For this Tref is connected to the non-inverting input of the error amplifier.
This error amplifier is high gain differential amplifier. It‟s inverting input is connected to the
either whole regulated output voltage or part of that from outside. For later case a potential divider of two
scaling resistors is used. Scaling resistors help in getting multiplied reference voltage or scaled up
reference voltage.
Error amplifier controls the series pass transistor Q1, which acts as variable resistor. The series
pass transistor is a small power transistor having about 800 mW dissipation. The unregulated power
supply source (< 36V d.c.) is connected to collector of series pass transistor.
Transistor Q2 acts as current limiter in case of short circuit condition. It senses drop across lc
placed in series with regulated output voltage externally.
The frequency compensation terminal controls the frequency response of the error amplifier. The
required roll-off is obtained by connecting a small capacitor of 100 pF between frequency compensation
and inverting input terminals. The internal structure can be represented in more simplified form as shown
in the Fig.
DAC(Digital to Analog Conversion)
Types of DAC: Weighted resistor, R-2R ladder and Inverted R-2R ladder
Weighted Resistor

4. One of the simplest circuits shown in fig uses a summing amplifier with a binary weighted resistor
network. It has n-electronic switches d1,d2,…dn controlled by binary input word. This switches are single
pole double through (SPDT) type. If the binary input to a particular switch is 1, it connects the resistance
to the reference voltage (-VR) and if the input bit is 0, the switch connect the resistor to the ground the
output current Io for an ideal op-amp can be written as Io=I1+I2+….In
1 22
1 2
1 2
....
2 2 2
( 2 2 ...... 2 )
R R R
nn
nR
n
V V V
d d d
R R R
V
d d d
R
  
   
  
the output voltage vo=IoRf =
1 2
1 2( 2 2 ...... 2 )f n
R n
R
V d d d
R
  
 
The circuit shown in fig uses a negative
reference voltage. The analog output voltage is therefore positive staircase as shown in fig for a 3 bit
weighted resistor DAC
It may be noted that
1. Although the op-amp in fig is connected in inverting mode, it can also be connected in non-
inverting mode.
2. The op-amp is simply working as a current to voltage converter.
3. The polarity of the reference voltage is chosen in accordance with the type of the switch used.
4. The accuracy and stability of a DAC depends upon the accuracy of the resistor and the tracking of
each other with temperature.
Advantages:
• It is Simple in Construction.
• It provides fast conversion.
Disadvantages:
• This type requires large range of resistors with necessary high precision for low resistors.
• Requires low switch resistances in transistors.
• Can be expensive. Hence resolution is limited to 8-bit size
R-2R ladder type
Wide range of resistors are required in binary weighted resistor type DCA. This can be avoided by using
R-2R ladder type DAC where only two values of resistors are required. It is well suited for integrated
circuit realization. The typical value of r ranges from 2.5 KΩ to 10 KΩ

5. For simplicity, consider a 3bit DAC as shown in the figure, where the switch positions d1d2d3 corresponds
to the binary word 100. The circuit can be equivalent form of fig (b) and finally to fig. (c). then, voltage at
node C can be easily calculated by
2
3
2 42
3
R
R
V R
V
R R
 
  
   

the output voltage is
2
4 2
R R
o
V VR
V
R
  
   
 
Inverted R-2R ladder
In weighted resistor and R-2R ladder types of D/A converters the current flowing through the resistors
changes as the input data changes. Power dissipation causes heating, and non-linearity of D/A conversions
arises due to varying power dissipation values corresponding to bit patterns. This becomes a serious

6. limitations as the word length increases. This is eliminated in the inverted R-2R ladder type of D/A
converter is shown in the fig.The bit position of each of the subsequent MSBs and LSBs are interchanged.
Each binary input is connected through the switch to either ground or to the inverting input terminal of
op-amp, which is at virtual ground. since both the positions of switch bi are at ground potential, i;e the
actual or virtual ground, the current flow through any resistor is constant and it is independent of the input
binary bit value.
Consider a reference current of 2ma. Just to the right of node A, the equivalent resistor is 2R. Thus 2ma of
reference input current divides equally to value 1ma at node A. similarly to the right of node b, the
equivalent resistor is 2R. Thus 1 ma of current further divides to value 0.5ma at node 5.similarly current
divides equally at node c to 0.25ma. The equal division of current in successive nodes remains the same in
the inverted R-2R ladder irrespective of the input binary word.
ADC(Aanlog and Digital Integrated circuits)
ADCs are classified broadly into two groups according to their conversion techniques. Direct type and
indirect type.
Direct type ADC: Compare a given analog signal with the internally generated equivalent signal. This
group includes flash(Comparator)type converter Counter type, tracking or servo converter, successive
approximation type converter.
Integrating type: Perform conversion in an indirect manner by first changing the analog input signal to a
linear function of time or frequency and then digital code.
Counter type
The counter type ADC converter is constructed using only one comparator with variable reference
voltage. The variable reference voltage can be obtained by a sequence counter and D/A converter. The
block diagram for an n-bit counter type A/D converter is shown in fig. The n-bit binary counter is initially
set to 0 by the reset switch which is normally active LOW. Therefore, the digital output is zero and the
analog equivalent Vr is also 0. When reset signal is released(High), the clock pulses gated through the
AND gate are counted by the binary counter.

7. The D/A converter converts the digital
output to an analog voltage and
connects it as the inverting input to the
comparator. The output of the
comparator enables the AND gate to
pass the clock. The number of counted
pulses increases with time and the
analog input Vr is a rising staircase
waveform as shown in the figure. The
counting will continue until the reference
voltage Vr equals and just rises more than
Vs. The the comparator output becomes
LOW and this enables the AND gate from
passing the clock. The counting stops at the
instance Vs< Vr and at that instant the digital
output of the comparator represents the
analog input voltage V0. Then the clock in inhibited, the counter stops its progress and the conversion is
said to be complete.
Successive Approximation ADC (Analog to Digital Converter)
Successive approximation ADC is
the advanced version of Digital ramp
type ADC which is designed to
reduce the conversion and to
increase speed of operation. The
major draw of digital ramp ADC is
the counter used to produce the
digital output will be reset after
every sampling interval. The normal counter starts counting from 0 and increments by one LSB in each
count, this result in 2N
clock pulses to reach its maximum value.
Operation of 3 bit Successive Approximation ADC
The output of SAR is converted to analog out by the DAC and this analog output is compared with the
input analog sampled value in the Opamp comparator. This Opamp provides an high or low clock pulse

8. based on the difference through the logic circuit. In very first case the 3 bit SAR enables its MSB bit as
high i.e. „1‟ and the result will be “100”.
This digital output is converted to analog value and compared with input sampled voltage (Vin). If
the deference is positive i.e. if the sampled input is high
then the SAR enables the next bit from MSB and result
will be “110”. Now if the output is negative i.e. if the
input sampled voltage is less than the SAR resets the last
set bit and sets the next bit and resultant output in this
case will be “101” which will definitely approximately
equal to the input analog value. The counting sequence is
explained by the following counter flow chat as shown in
fig.
Important note on Successive Approximation ADC
In Counter type or digital ramp type ADC the time taken
for conversion depends on the magnitude of the input,
but in SAR the conversion time is independent of the magnitude of the input sampled value.
Advantages of Successive Approximation ADC
 Speed is high compared to counter type ADC.
 Good ratio of speed to power.
 Compact design compared to Flash Type and it is inexpensive.
Disadvantages of Successive Approximation ADC
 Cost is high because of SAR
 Complexity in design.
Applications
The SAR ADC will used widely data acquisition techniques at the sampling rates higher than 10KHz
Dual slope ADC
In dual slope type ADC, the integrator generates two different ramps, one with the known analog input
voltage VA and another with a known reference voltage –Vref. Hence it is called a s dual slope A to D
converter. The logic diagram for the same is shown below The binary counter is initially reset to 0000; the
output of integrator reset to 0V and the input to the ramp generator or integrator is switched to the
unknown analog input voltage VA.The analog input voltage VA is integrated by the inverting integrator
and generates a negative ramp output. The output of comparator is positive and the clock is passed
through the AND gate. This results in counting up of the binary counter. The negative ramp continues for
a fixed time period t1, which is determined by a count detector for the time period t1. At the end of the
fixed time period t1, the ramp output of integrator is given by ∴VS=-VA/RC×t1

9. When the counter reaches
the fixed count at time
period t1, the binary
counter resets to 0000 and
switches the integrator
input to a negative
reference voltage –Vref.
Now the ramp generator
starts with the initial value –Vs and increases in positive direction until it reaches 0V and the counter gets
advanced. When Vs reaches 0V, comparator output becomes negative (i.e. logic 0) and the AND gate is
deactivated. Hence no further clock is
applied through AND gate. Now, the
conversion cycle is said to be completed and
the positive ramp voltage is given by
∴VS=Vref/RC×t2
Where Vref & RC are constants and time
period t2 is variable. The dual ramp output
waveform is shown below. Since ramp generator voltage starts at 0V, decreasing down to –Vs and then
increasing up to 0V, the amplitude of negative and positive ramp voltages can be equated as follows.
∴Vref/RC×t2=-VA/RC×t1
∴t2=-t1×VA/Vref
∴VA=-Vref×t1/t2
Thus the unknown analog input voltage VA is proportional to the time period t2, because Vref is a known
reference voltage and t1 is the predetermined time period. The actual conversion of analog voltage VA into
a digital count occurs during time t2. The binary counter gives corresponding digital value for time period
t2. The clock is connected to the counter at the beginning of t2 and is disconnected at the end of t2.
Thus the counter counts digital output as Digital output=(counts/sec) t2
∴Digital output=(counts/sec)[t1×VA/Vref ]