FINFET
NEED OF MULTIGATE FETS: 
 REDUCTION OF SHORT CHANNEL EFFECTS. 
 REDUCTION OF LEAKAGE CURRENTS 
 MORE COMPACT
DUAL GATE FETS: 
DOUBLE-GATE (DG) FETS, IN WHICH A SECOND GATE 
IS ADDED OPPOSITE THE TRADITIONAL (FIRST) GATE, 
HAVE BETTER CONTROL OVER SHORT-CHANNEL 
EFFECTS [SCES]. 
 HIGH TOLERANCE TO SCALING 
BETTER INTEGRATION FEASIBILITY.
REDUCED GATE LEAKAGE CURRENT:
PLANAR MOS STRUCTURE 
GATE MISALIGNMENT
SHORT CHANNEL EFFECT: 
A SHORT-CHANNEL EFFECT IS AN EFFECT WHEREBY A 
MOSFET IN WHICH THE CHANNEL LENGTH IS THE 
SAME ORDER OF MAGNITUDES AS THE DEPLETION-LAYER 
WIDTHS (XDD, XDS) OF THE SOURCE AND DRAIN 
JUNCTION. 
AS THE CHANNEL LENGTH IS REDUCED TO INCREASE 
BOTH SPEED AND NUMBER OF COMPONENTS PER CHIP , 
THEN SHORT CHANNEL EFFECT OCCURS. 
As the channel length ‘l’ is reduced to increase both the o 
peratiospeedanenumber of components per chip, the so called SCE occurs.
PROCESS FLOW OF FINFET:
ADVANTAGES: 
 HIGHER TECHNOLOGICAL MATURITY THAN 
CONVENTIONAL MOSFET, DG-MOSFET 
 SUPRESSED SCE 
 BETTER CONTROL OF GATE CURRENT 
 LOW COST & SCALIBILTY FACTOR 
 LOW POWER CONSUMPTION (HIGHER DRIVE 
CURRENT AT LOW SUPPLY VOLTAGE)
finfet & dg-fet technology

finfet & dg-fet technology

  • 1.
  • 2.
    NEED OF MULTIGATEFETS:  REDUCTION OF SHORT CHANNEL EFFECTS.  REDUCTION OF LEAKAGE CURRENTS  MORE COMPACT
  • 3.
    DUAL GATE FETS: DOUBLE-GATE (DG) FETS, IN WHICH A SECOND GATE IS ADDED OPPOSITE THE TRADITIONAL (FIRST) GATE, HAVE BETTER CONTROL OVER SHORT-CHANNEL EFFECTS [SCES].  HIGH TOLERANCE TO SCALING BETTER INTEGRATION FEASIBILITY.
  • 4.
  • 6.
    PLANAR MOS STRUCTURE GATE MISALIGNMENT
  • 8.
    SHORT CHANNEL EFFECT: A SHORT-CHANNEL EFFECT IS AN EFFECT WHEREBY A MOSFET IN WHICH THE CHANNEL LENGTH IS THE SAME ORDER OF MAGNITUDES AS THE DEPLETION-LAYER WIDTHS (XDD, XDS) OF THE SOURCE AND DRAIN JUNCTION. AS THE CHANNEL LENGTH IS REDUCED TO INCREASE BOTH SPEED AND NUMBER OF COMPONENTS PER CHIP , THEN SHORT CHANNEL EFFECT OCCURS. As the channel length ‘l’ is reduced to increase both the o peratiospeedanenumber of components per chip, the so called SCE occurs.
  • 9.
  • 11.
    ADVANTAGES:  HIGHERTECHNOLOGICAL MATURITY THAN CONVENTIONAL MOSFET, DG-MOSFET  SUPRESSED SCE  BETTER CONTROL OF GATE CURRENT  LOW COST & SCALIBILTY FACTOR  LOW POWER CONSUMPTION (HIGHER DRIVE CURRENT AT LOW SUPPLY VOLTAGE)