This document contains a question bank with multiple choice and short answer questions covering various topics in digital electronics across 5 units. Some of the key topics covered include binary, hexadecimal, octal number systems; logic gates and families (TTL, CMOS, ECL); flip-flops, counters, registers; basics of memory units (RAM, ROM); programmable logic devices (PLA, PLD); and asynchronous sequential circuits including hazards. The document is divided into parts for each unit with concepts ranging from introductory to advanced level questions.

1. DIGITAL ELECTRONICS
QUESTION BANK
UNIT I
PART-A
1. Define Minterms & Maxterms.
2. Find the decimal equivalent for 11011012.
3. Convert the binary to gray code 1110112.
4. What is excess 3 codes?
5. Obtain the octal number for F3BC16.
6. (0.5456)10 = (?)2.
7. Divide 1101011012. By 1012.
8. What is BCD code?
9. State De-Morgan’s law.
10. Define octet and quad in K-Map.
11. Convert the given decimal number to binary (a) 145 (b) 100
12. Find the 10’s complement of 52520
13. Find the 2’s complement of 1001001?
14. Convert gray code to binary code 1101?
15. Classify different types of weighted &non-weighted codes.
16. Convert the decimal (432)10 to BCD code?
17. Convert the following hexadecimal number to decimal number 13AF
18. Write short notes on gray code?
19. Minimize the expression using k-map method
F(A,B,C)= ∑ m(1,2,3,5,7)
20. Add two numbers (643)8 and (774)8
21. Define commutative law.
22. Give the truth table and symbol of EX-N0R gate.
23. What is karnaugh map?

2. 24. Define SOP & POS.
25. Find the 9’s Complement for (5763)10
PART-B
1.Simplify using K-map F (A,B,C,D) =∑m(0,2,4,5,6,8,10,15).Implement the
Reduced function using NAND gate only.
2 Reduce the following function using K map technique.
F (W,X,Y,Z) = ∑m( 0,7,8,9,10,12) + ∑d(2,5,13)
3. Reduce the following function using K map technique
F(A,B,C,D)= п M (0,3,4,7,8,10,12,14) + d(2,6)
4. Perform the following
a) Convert (FCB3A)16 to octal equivalent
b) Subtract 10001002 from 1010100 using 2’s Complement method.
c) Add 32 and 65 using Excess – 3.
d) 3A76F16– 2CB3916
e) Convert the Decimal into binary (183.65)10
5. Simplify using Quine McClusky method
F(A,B,C,D)=  m(0,1,2,3,11,12,13,14,15)
6. Simplify using K-map F (P, Q, R, S) = п M (0, 1, 2, 3, 6, 7, 13, 15).Implement
the reduced function using NOR gate only.
7. Simplify using Tabulation method
F(W,X,Y,Z)=  m(0,2,3,6,7,8,10,12,13)
8. Reduce the following expressions:
a) A’BCD’+BCD’+BC’D’+BC’D
b) XY+XYZ+XYZ’+X’YZ

3. c) A’B’C’+A’BC’+A’BC
d) (A+B) (A’+C) (B’+C)
9. Perform the following:
a) Convert (4357)8 to Hexadecimal equivalent
b) Subtract 10001002 from 11101012 using 1’s Complement method.
c) Add 24 and 18 using BCD
d) (101011.110)2= (?)10
e) Convert binary to gray number 10110102
10. Minimize the function using k-map
F (A, B, C, D) = A’B’D+ABC’D’+A’BD+ABCD’
UNIT II
PART-A
1. What are the advantages of digital integrated circuits?
2. List the advantages and disadvantages of RTL family?
3. What are the merits and demerits of DTL family?
4. Draw the circuit diagram for HTL NAND gate
5. Compare the totem-pole and open-collector outputs?
6. List the important characteristics of NMOS Logic?
7. State two advantages of CMOS logic
8. Give the characteristics of ECL family.
9. Define fan out for a logic circuit.
10. What is Tri-state gates?
11. Draw the circuit for Tri-State TTL inverter
12. Draw the HTL NAND gate.
13. Explain the 2 input NAND gate of DTL family?

4. 14. Explain the wired and connection?
15. What is an open collector output TTL?
16. What is meant by wired operation?
17. State advantages and disadvantages of TTL
18. How schottky transistors are formed and state its use?
19. What is depletion mode operation MOS?
20. What is Operating temperature?
21. What is integrated circuit?
22. List the advantage of I2
family.
23. What is High Threshold Logic?
24. State the advantage and disadvantage of a totem-pole output.
25. What is meant by source and sink current?
PART-B
1. Write short notes on
a. Current and voltage. b. Fan-out
c. Noise margin d. Propagation delay.
e. Power dissipation. f. Speed power product.
2. Explain the 2-input NAND gate of DTL family. Mention its specifications.
3. Draw the circuit diagram and explain the operation of 2 input TTL NAND gate
with Totem-pole output.
4. Draw the circuit diagram and explain the operation of ECL OR/NOR gate.
5. Draw and explain the circuit of two point CMOS NAND and NOR gates.
6. With neat sketch explain the operation of RTL and HTL logic family.

5. 7. Draw and explain the circuit of two input NMOS NAND, NOR and NOT gates.
8. Explain briefly about the operation of Tri-state gates with neat circuit diagram
9. Draw and explain the operation of I2
L inverter.
10. Draw and the circuit diagram and explain the operation of two input TTL NAND
gate with open collector output.
UNIT III
PART-A
1. Give the logical expression for sum and carry for a half adder.
2. What is encoder?
3. What is an ALU?
4. What is EPROM?
5. What is PLA?
6. Give the truth table for half Sub tractor.
7. What is Comparator?
8. What is code converter?
9. Mention the difference between a DEMUX and MUX.
10. How an encoder does differs from a decoder?
11. List basic types of programmable logic devices.
12. What is ROM?
13. State the types of ROM
14. What is programmable logic array? How it differs from ROM?
15. What is PROM.?
16. Define shift registers?
17. What is EEPROM?

6. 18. What is static ram?
19. List the characteristics of memory?
20. What is dynamic ram?
21. Explain various memory decoding techniques?
22. Give the classification of semiconductor memory?
23. Discuss the application of RAM and ROM
24. What is PAL?
25. Compare the PROM and PLA?
PART-B
1. Design and explain the working of half adder and Full subtractor.
2. Draw and explain a 3 to 8 line decoder. Mention its advantages.
3. Implement the following functions using multiplexer.
a. F(A,B,C)=∑m(2,4,5,8,9,10,12)
b. F(A,B,C,D)=∑m(1,5,8,11,12,15)
c. F(A,B,C,D)=∑m(0,3,4,7,8,11)+d (2,10,12)
4. Design and explain the working of a Binary to Gray code converter.
5. What is Comparator? Design a 2-bit Magnitude comparator.
6. With neat circuit diagram explain the operations of De-Multiplexer unit.
7. What is a PLA? Implement the following using PLA
A(x, y, z) = Σm (1, 2, 4, 6)
B(x, y, z) = Σm (0, 1, 6, 7)
C(x, y, z) = Σm (2, 6)
8. Design a BCD to EXCESS-3 code converter using logic gates.
9. Discuss in detail about semiconductor memories.
10. What is encoder? Draw and explain the priority encoder.
UNIT IV
PART-A

7. 1. What do you mean by sequential circuits?
2. What is Flip Flop? Mention its types.
3. Give the Truth table for SR FF.
5. Differentiate between counters and shift registers.
6. What is Ripple counter?
7. State the difference between Synchronous and Asynchronous counters.
8. Draw the truth table for JK latch.
9. Explain various triggering methods.
10. What is State diagram?
11. What are the classifications of sequential circuits?
12. What do you mean by present state?
13. Define synchronous sequential circuit
14. Give the truth table for D flip-flop?
15. Draw a Master-Slave JK flip-flop?
16. What do you mean by next state?
17. Define race around condition.
18. What is edge-triggered flip-flop?
19. What is a master-slave flip-flop?
20. Define rise time.
21. Define fall time.
22. Define shift registers?
23. What are the different types of shift type?
24. State the types of sequential circuits?
25. What is a synchronous counter?
PART-B
1. Draw and explain the operation of SR.

8. 2. Explain the working operation of master-slave JK flip flop.
3. Write short notes on
a. State table b. State diagram
c. Memory decoding
4. Design a synchronous counter with states 0, 1, 2, 3, 4, 0, 1…Using D flip-
Flops.
5. Design and explain about BCD counter.
6. With neat logic diagram explain the operations of D and T flip-flops.
7. Explain briefly about serial in serial out shift registers with neat sketch.
8. A Sequential circuit has one input and one output. The State diagram is shown
Below. Design a Sequential circuit using T FF.
9. What is Triggering in FF? Convert an SR Flip Flop to JK Flip Flop.
10. Explain about the counter and its applications?

9. UNIT V
PART-A
1. What are the fundamental mode sequential circuits?
2. Define stable state.
3. What are races & cycles?
4. Define glitch.
5. Differentiate fundamental mode and pulse mode sequential circuits.
6. What are the different types of hazards in asynchronous sequential circuits?
7. Differentiate static 0 & static 1 hazard.
8. What do you meant by hazard free asynchronous sequential circuits?
9. How can essential hazards be eliminated?
10. What is the significance of state assignment?
11. What are races?
12. Define non critical race.
13. Define critical race?
14. Write short note on shared row state assignment.
15. Write a short note on fundamental mode asynchronous circuit.
16. What is a cycle?
17. What is fundamental mode?
18. Write short note on one hot state assignment.
19. What is race around condition?
20. Explain the pulse mode asynchronous sequential circuit?
21. What are hazards?
22. Define essential hazards
23. Explain the one hot state assignment
24. Explain the shared row state assignment
25. Define secondary variables
PART-B

10. 1. Explain in detail about cycles and hazards with suitable examples
2. Explain in detail about pulse mode sequential circuits.
3. Explain static, dynamic and essential hazards in digital circuit. Give hazard free
Realization for the following Boolean function
f(A,B,C,D)=Σm(2,3,5,7,10,14)
4. Explain the procedure to give the hazard free realization of a Boolean function
5. Give hazard-free realization for the following function
f(A,B,C,D)=Σm(0,2,6,7,8,10,12)
6. Explain the different methods of state Assignment in Asynchronous sequential
Circuits.
7. Discuss in detail about different types of races and cycles with neat timing
diagram.
8. Explain in detail about fundamental mode sequential circuits.
9. List the different techniques used for state assignment.
10. How to reduction of primitive flow table and give the example?