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R09 Set No. 2Code No: A109210503
1
II B.Tech I Semester Examinations,MAY 2011
DIGITAL LOGIC DESIGN
Computer Science And Engineering
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. Explain about the following:
(a) latch excitation table
(b) Merging of flow tables. [15]
2. Explain about the Following
(a) Serial Transfer in 4-bit shift Registers
(b) Binary Ripple Counter
(c) HDL for Synchronous Counter. [15]
3. Draw the two-dimensional decoding structure for a 1k-word memory? [15]
4. (a) Simplify to a sum of 3 terms:
A’C’D’ +AC’ +BCD + A’CD’ + A’BC + AB’C’
(b) Given AB’ + AB = C, Show that AC’ + A’C = B
(c) Factor to obtain a Product of Sums(simplify where possible) A’C’D’ +ABD’
+ A’CD +B’D. [5+5+5]
5. Design a sequential circuit with two D flip-flops A and B. and one input x. when
x=0,the state of the circuit remains the same. When x=1,the circuit goes through
the state transition from 00 to 11 to 11 to 10 back to 00.and repeats. [15]
6. (a) What is the gray code equivalent of the Hex Number 3A7
(b) Find the biquinary of number code for the decimal numbers from 0 to 9
(c) Find 9’s complement of (25.6391)0
(d) Find (72532 - 03250) using 9’s complement. [4+3+4+4]
7. (a) Let f =
P
(5,6,13) and f1=
P
(0,1,2,3,5,6,8,9,10,11,13).Find f2 such that f=f1
x f2’.
(b) Find all minimal four variable functions which assume the value 1 when the
minterms 4,10,11,13 are equal to 1 and assume the value 0 when the minterms
1,3,6,7,8,9,12,14 are equal to 1. [7+8]
8. Design 4 digit BCD adder using 7483 adders. [15]
? ? ? ? ?
2
R09 Set No. 4Code No: A109210503
II B.Tech I Semester Examinations,MAY 2011
DIGITAL LOGIC DESIGN
Computer Science And Engineering
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. Explain about
(a) ROM
(b) FPGA. [7+8]
2. Explain about HDL for Sequential Circuits in Detail? [15]
3. Explain about the following:
(a) Transition table and output map
(b) Maps for Latch inputs. [15]
4. (a) Design a circuit with three inputs(A,B,C) and two outputs(X,Y) where the
outputs are the binary count of the number of “ON” (HIGH) inputs
(b) Design a circuit with four inputs and one output where the output is 1 if the
input isdivisible by 3 or 7. [7+8]
5. Define BCD Counter and Draw its State table for BCD Counter? [15]
6. (a) Find the possible terms which could be added to the expression using the
consensus theorem.Then reduce to a minimum SOP
A’C’D’ + BCD + AB’C’ +A’BC
(b) In a board of directors meeting 4 resolutions A,B,C,D are up to a vote. The
vote must be governed by the following rules:
i. Those who vote for resolution B must also vote for resolution C.
ii. It is possible to vote for both resolutions A& C, only if a vote for either
B or D is also cast.
iii. Those who vote for either resolution C or D or vote against resolution
A must vote for resolution B. Each member of the board has 4 switches
A,B,C,D which he presses or releases, depending on whether he is in favor
of or against the resolution under the consideration. The switches of each
member are the inputs to a circuit associated with that member. Design
such a circuit with as few gates as possible. [5+10]
7. (a) Verify that NAND and NOR operations are Commutative but not Associative.
3
R09 Set No. 4Code No: A109210503
(b) A certain 4 input gate called LEMON gate realizes the switching function
LEMON(A,B,C,D) = BC(A+D)
Assuming that the input variables are available in both primed and unprimed
form:
i. show a realization of the function f(w,x,y,z)=
P
(0,1,6,9,10,11,14,15) with
only three LEMON gates and one OR gate.
ii. Can all switching functions be realized with LEMON/OR logic. [5+5+5]
8. (a) Show the weights of three different 4 bit self complementing codes whose only
negative weight is - 4 and write down number system from 0 to 9
(b) Decimal system became popular because we have 10 fingers. A rich person on
earth has decided to distribute Rs.one lakh equally to the following persons
from various planets. Find out the amount each one of them will get in their
respective currencies:
A from planet VENUS possessing 8 fingers
B from planet MARS possessing 6 fingers
C from planet JUPITER possessing 14 fingers
D from planet MOON possessing 16 fingers [7+8]
? ? ? ? ?
4
R09 Set No. 1Code No: A109210503
II B.Tech I Semester Examinations,MAY 2011
DIGITAL LOGIC DESIGN
Computer Science And Engineering
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. Draw a diagram and Explain about Address multiplexers for 64 k DRAM? [15]
2. Explain about 4-bit Universal Shift Registers? [15]
3. (a) Design a circuit with four inputs and one output where the output is 1 if the
input is divisible by 3 or 7.
(b) A safe has 5 locks: v,w,x,y,z all of which must be unlocked for the safe to open.The
keys to the locks are distributed among five executives in the following man-
ner: Mr.A has keys for locks v& x
Mr.B has keys for locks v& y
Mr.C has keys for locks w& y
Mr.D has keys for locks x& z
Mr.E has keys for locks v& z
i. Determine the minimal no. of executives required to open the safe.
ii. Find all the combinations of executives that can open the safe, write an
expression f(A,B,C,D,E) which specifies when the safe can be opened as
a function of which executives are present
iii. Who is the ‘essential executive’ without whom the safe cannot be opened.
[7+8]
4. Convert the following numbers:
(a) 10101100111.0101 to Base 10
(b) (153.513)10 = ( )8
(c) Find (3250 - 72532)10 using 10’s complement
(d) Divide 01100100 by 00011001
(e) Given that (292)10 =(1204)b determine ‘b’ [3+3+3+3+3]
5. Explain about the Procedure for Designing Sequential Circuits in detail? [15]
6. (a) Explain the difference between asynchronous and synchronous sequential cir-
cuits.
(b) Define fundamental-mode operation
(c) Explain the difference between stable and unstable states
(d) What is the difference between an internal state and a total state? [15]
5
R09 Set No. 1Code No: A109210503
7. (a) Design a BCD to Excess-3 code converter using minimum number of NAND
gates
(b) Design a BCD to Gray code converter using 8:1 multiplexers. [10+5]
8. For the function T(w,x,y,z)=
P
(0,1,2,3,4,6,7,8,9,11,15):
(a) Find all prime implicants and indicate which are essential through the Kmap
(b) Design a circuit which will find the 2’s complement of a 4 bit binary num-
ber.Use one full adder,3 half adders and any additional gates. [5+10]
? ? ? ? ?
6
R09 Set No. 3Code No: A109210503
II B.Tech I Semester Examinations,MAY 2011
DIGITAL LOGIC DESIGN
Computer Science And Engineering
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. (a) Implement Half adder using 4 NAND gates
(b) Implement full subtrctor using NAND gates only. [5+10]
2. Explain about the following:
(a) Merger diagrams
(b) Flow and implication tables. [15]
3. Explain about
(a) Address multiplexers
(b) Hamming code. [7+8]
4. Design a Modulo-12 up Synchronous counter Using T-Flip Flops and draw the
Circuit diagram? [15]
5. (a) design a 2 bit comparator using gates.
(b) Use an 8-to-1 MUX to design the following combinational logic circuit There
are four adjacent parking slots in the XYZ Inc executive parking area. Each
slot is equipped with a special sensor whose output is asserted high when a car
is occupying the slot. Design a decoding system that will signal the existence
of two or more adjacent vacant slots. [10+5]
6. Define Latch? Explain about Different types of Latches in detail? [15]
7. (a) Perform the subtraction with the following unsigned binary numbers by taking
the 2’s complement of the subtrahend:
i. 100 - 110000
ii. 11010 - 1101.
(b) Construct a table for 4 -3 -2 -1 weighted code and write 9154 using this code
(c) Perform arithmetic operation indicated below.Follow signed bit notation:
i. 001110 + 110010
ii. 101011 - 100110.
(d) Explain the importance of gray code. [4+4+4+3]
8. (a) Simplify to a sum of 3 terms:
A’B’C’ +ABD+A’C +A’CD’ +AC’D + AB’C’
7
R09 Set No. 3Code No: A109210503
(b) As part of an aircraft’s functional monitoring system, a circuit is required to
indicate the status of the landing gears prior to landing. Green LED display
turns on if all three gears are properly extended when the “gear down” switch
has been activated in preparation for landing. Red LED display turns on if
any of the gears fail to extend properly prior to landing. When a landing
gear is extended, its sensor produces a LOW voltage. When a landing gear is
retracted, its sensor produces a HIGH voltage. Implement a circuit to meet
this requirement.
(c) In a certain chemical processing plant, a liquid chemical is used in a manufac-
turing process. The chemical is stored in three different tanks. A level sensor
in each tank produces a HIGH voltage when the level of chemical in the tank
drops below a specified point. Design a circuit that monitors the chemical
level in each tank and indicates when the level in any two of the tanks drops
below the specified point. [5+5+5]
? ? ? ? ?

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Digital Logic Design exam questions and answers

  • 1. R09 Set No. 2Code No: A109210503 1 II B.Tech I Semester Examinations,MAY 2011 DIGITAL LOGIC DESIGN Computer Science And Engineering Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ? ? ? ? ? 1. Explain about the following: (a) latch excitation table (b) Merging of flow tables. [15] 2. Explain about the Following (a) Serial Transfer in 4-bit shift Registers (b) Binary Ripple Counter (c) HDL for Synchronous Counter. [15] 3. Draw the two-dimensional decoding structure for a 1k-word memory? [15] 4. (a) Simplify to a sum of 3 terms: A’C’D’ +AC’ +BCD + A’CD’ + A’BC + AB’C’ (b) Given AB’ + AB = C, Show that AC’ + A’C = B (c) Factor to obtain a Product of Sums(simplify where possible) A’C’D’ +ABD’ + A’CD +B’D. [5+5+5] 5. Design a sequential circuit with two D flip-flops A and B. and one input x. when x=0,the state of the circuit remains the same. When x=1,the circuit goes through the state transition from 00 to 11 to 11 to 10 back to 00.and repeats. [15] 6. (a) What is the gray code equivalent of the Hex Number 3A7 (b) Find the biquinary of number code for the decimal numbers from 0 to 9 (c) Find 9’s complement of (25.6391)0 (d) Find (72532 - 03250) using 9’s complement. [4+3+4+4] 7. (a) Let f = P (5,6,13) and f1= P (0,1,2,3,5,6,8,9,10,11,13).Find f2 such that f=f1 x f2’. (b) Find all minimal four variable functions which assume the value 1 when the minterms 4,10,11,13 are equal to 1 and assume the value 0 when the minterms 1,3,6,7,8,9,12,14 are equal to 1. [7+8] 8. Design 4 digit BCD adder using 7483 adders. [15] ? ? ? ? ?
  • 2. 2 R09 Set No. 4Code No: A109210503 II B.Tech I Semester Examinations,MAY 2011 DIGITAL LOGIC DESIGN Computer Science And Engineering Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ? ? ? ? ? 1. Explain about (a) ROM (b) FPGA. [7+8] 2. Explain about HDL for Sequential Circuits in Detail? [15] 3. Explain about the following: (a) Transition table and output map (b) Maps for Latch inputs. [15] 4. (a) Design a circuit with three inputs(A,B,C) and two outputs(X,Y) where the outputs are the binary count of the number of “ON” (HIGH) inputs (b) Design a circuit with four inputs and one output where the output is 1 if the input isdivisible by 3 or 7. [7+8] 5. Define BCD Counter and Draw its State table for BCD Counter? [15] 6. (a) Find the possible terms which could be added to the expression using the consensus theorem.Then reduce to a minimum SOP A’C’D’ + BCD + AB’C’ +A’BC (b) In a board of directors meeting 4 resolutions A,B,C,D are up to a vote. The vote must be governed by the following rules: i. Those who vote for resolution B must also vote for resolution C. ii. It is possible to vote for both resolutions A& C, only if a vote for either B or D is also cast. iii. Those who vote for either resolution C or D or vote against resolution A must vote for resolution B. Each member of the board has 4 switches A,B,C,D which he presses or releases, depending on whether he is in favor of or against the resolution under the consideration. The switches of each member are the inputs to a circuit associated with that member. Design such a circuit with as few gates as possible. [5+10] 7. (a) Verify that NAND and NOR operations are Commutative but not Associative.
  • 3. 3 R09 Set No. 4Code No: A109210503 (b) A certain 4 input gate called LEMON gate realizes the switching function LEMON(A,B,C,D) = BC(A+D) Assuming that the input variables are available in both primed and unprimed form: i. show a realization of the function f(w,x,y,z)= P (0,1,6,9,10,11,14,15) with only three LEMON gates and one OR gate. ii. Can all switching functions be realized with LEMON/OR logic. [5+5+5] 8. (a) Show the weights of three different 4 bit self complementing codes whose only negative weight is - 4 and write down number system from 0 to 9 (b) Decimal system became popular because we have 10 fingers. A rich person on earth has decided to distribute Rs.one lakh equally to the following persons from various planets. Find out the amount each one of them will get in their respective currencies: A from planet VENUS possessing 8 fingers B from planet MARS possessing 6 fingers C from planet JUPITER possessing 14 fingers D from planet MOON possessing 16 fingers [7+8] ? ? ? ? ?
  • 4. 4 R09 Set No. 1Code No: A109210503 II B.Tech I Semester Examinations,MAY 2011 DIGITAL LOGIC DESIGN Computer Science And Engineering Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ? ? ? ? ? 1. Draw a diagram and Explain about Address multiplexers for 64 k DRAM? [15] 2. Explain about 4-bit Universal Shift Registers? [15] 3. (a) Design a circuit with four inputs and one output where the output is 1 if the input is divisible by 3 or 7. (b) A safe has 5 locks: v,w,x,y,z all of which must be unlocked for the safe to open.The keys to the locks are distributed among five executives in the following man- ner: Mr.A has keys for locks v& x Mr.B has keys for locks v& y Mr.C has keys for locks w& y Mr.D has keys for locks x& z Mr.E has keys for locks v& z i. Determine the minimal no. of executives required to open the safe. ii. Find all the combinations of executives that can open the safe, write an expression f(A,B,C,D,E) which specifies when the safe can be opened as a function of which executives are present iii. Who is the ‘essential executive’ without whom the safe cannot be opened. [7+8] 4. Convert the following numbers: (a) 10101100111.0101 to Base 10 (b) (153.513)10 = ( )8 (c) Find (3250 - 72532)10 using 10’s complement (d) Divide 01100100 by 00011001 (e) Given that (292)10 =(1204)b determine ‘b’ [3+3+3+3+3] 5. Explain about the Procedure for Designing Sequential Circuits in detail? [15] 6. (a) Explain the difference between asynchronous and synchronous sequential cir- cuits. (b) Define fundamental-mode operation (c) Explain the difference between stable and unstable states (d) What is the difference between an internal state and a total state? [15]
  • 5. 5 R09 Set No. 1Code No: A109210503 7. (a) Design a BCD to Excess-3 code converter using minimum number of NAND gates (b) Design a BCD to Gray code converter using 8:1 multiplexers. [10+5] 8. For the function T(w,x,y,z)= P (0,1,2,3,4,6,7,8,9,11,15): (a) Find all prime implicants and indicate which are essential through the Kmap (b) Design a circuit which will find the 2’s complement of a 4 bit binary num- ber.Use one full adder,3 half adders and any additional gates. [5+10] ? ? ? ? ?
  • 6. 6 R09 Set No. 3Code No: A109210503 II B.Tech I Semester Examinations,MAY 2011 DIGITAL LOGIC DESIGN Computer Science And Engineering Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ? ? ? ? ? 1. (a) Implement Half adder using 4 NAND gates (b) Implement full subtrctor using NAND gates only. [5+10] 2. Explain about the following: (a) Merger diagrams (b) Flow and implication tables. [15] 3. Explain about (a) Address multiplexers (b) Hamming code. [7+8] 4. Design a Modulo-12 up Synchronous counter Using T-Flip Flops and draw the Circuit diagram? [15] 5. (a) design a 2 bit comparator using gates. (b) Use an 8-to-1 MUX to design the following combinational logic circuit There are four adjacent parking slots in the XYZ Inc executive parking area. Each slot is equipped with a special sensor whose output is asserted high when a car is occupying the slot. Design a decoding system that will signal the existence of two or more adjacent vacant slots. [10+5] 6. Define Latch? Explain about Different types of Latches in detail? [15] 7. (a) Perform the subtraction with the following unsigned binary numbers by taking the 2’s complement of the subtrahend: i. 100 - 110000 ii. 11010 - 1101. (b) Construct a table for 4 -3 -2 -1 weighted code and write 9154 using this code (c) Perform arithmetic operation indicated below.Follow signed bit notation: i. 001110 + 110010 ii. 101011 - 100110. (d) Explain the importance of gray code. [4+4+4+3] 8. (a) Simplify to a sum of 3 terms: A’B’C’ +ABD+A’C +A’CD’ +AC’D + AB’C’
  • 7. 7 R09 Set No. 3Code No: A109210503 (b) As part of an aircraft’s functional monitoring system, a circuit is required to indicate the status of the landing gears prior to landing. Green LED display turns on if all three gears are properly extended when the “gear down” switch has been activated in preparation for landing. Red LED display turns on if any of the gears fail to extend properly prior to landing. When a landing gear is extended, its sensor produces a LOW voltage. When a landing gear is retracted, its sensor produces a HIGH voltage. Implement a circuit to meet this requirement. (c) In a certain chemical processing plant, a liquid chemical is used in a manufac- turing process. The chemical is stored in three different tanks. A level sensor in each tank produces a HIGH voltage when the level of chemical in the tank drops below a specified point. Design a circuit that monitors the chemical level in each tank and indicates when the level in any two of the tanks drops below the specified point. [5+5+5] ? ? ? ? ?