Memory organization in computer architectureFaisal Hussain
Memory organization in computer architecture
Volatile Memory
Non-Volatile Memory
Memory Hierarchy
Memory Access Methods
Random Access
Sequential Access
Direct Access
Main Memory
DRAM
SRAM
NVRAM
RAM: Random Access Memory
ROM: Read Only Memory
Auxiliary Memory
Cache Memory
Hit Ratio
Associative Memory
About Cache Memory
working of cache memory
levels of cache memory
mapping techniques for cache memory
1. direct mapping techniques
2. Fully associative mapping techniques
3. set associative mapping techniques
Cache memroy organization
cache coherency
every thing in detail
Memory organization in computer architectureFaisal Hussain
Memory organization in computer architecture
Volatile Memory
Non-Volatile Memory
Memory Hierarchy
Memory Access Methods
Random Access
Sequential Access
Direct Access
Main Memory
DRAM
SRAM
NVRAM
RAM: Random Access Memory
ROM: Read Only Memory
Auxiliary Memory
Cache Memory
Hit Ratio
Associative Memory
About Cache Memory
working of cache memory
levels of cache memory
mapping techniques for cache memory
1. direct mapping techniques
2. Fully associative mapping techniques
3. set associative mapping techniques
Cache memroy organization
cache coherency
every thing in detail
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I/O subsystems: Input/output devices such as Disk, CD,ROM, Printer etc.; Interfacing with IO devices, keyboard and display interfaces; Basic concepts Bus Control, Read Write operations, Programmed IO, Concept of handshaking, Polled and Interrupt driven I/O, DMA data transfer
The French Revolution, which began in 1789, was a period of radical social and political upheaval in France. It marked the decline of absolute monarchies, the rise of secular and democratic republics, and the eventual rise of Napoleon Bonaparte. This revolutionary period is crucial in understanding the transition from feudalism to modernity in Europe.
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Read| The latest issue of The Challenger is here! We are thrilled to announce that our school paper has qualified for the NATIONAL SCHOOLS PRESS CONFERENCE (NSPC) 2024. Thank you for your unwavering support and trust. Dive into the stories that made us stand out!
Model Attribute Check Company Auto PropertyCeline George
In Odoo, the multi-company feature allows you to manage multiple companies within a single Odoo database instance. Each company can have its own configurations while still sharing common resources such as products, customers, and suppliers.
The Indian economy is classified into different sectors to simplify the analysis and understanding of economic activities. For Class 10, it's essential to grasp the sectors of the Indian economy, understand their characteristics, and recognize their importance. This guide will provide detailed notes on the Sectors of the Indian Economy Class 10, using specific long-tail keywords to enhance comprehension.
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Operation “Blue Star” is the only event in the history of Independent India where the state went into war with its own people. Even after about 40 years it is not clear if it was culmination of states anger over people of the region, a political game of power or start of dictatorial chapter in the democratic setup.
The people of Punjab felt alienated from main stream due to denial of their just demands during a long democratic struggle since independence. As it happen all over the word, it led to militant struggle with great loss of lives of military, police and civilian personnel. Killing of Indira Gandhi and massacre of innocent Sikhs in Delhi and other India cities was also associated with this movement.
The Roman Empire A Historical Colossus.pdfkaushalkr1407
The Roman Empire, a vast and enduring power, stands as one of history's most remarkable civilizations, leaving an indelible imprint on the world. It emerged from the Roman Republic, transitioning into an imperial powerhouse under the leadership of Augustus Caesar in 27 BCE. This transformation marked the beginning of an era defined by unprecedented territorial expansion, architectural marvels, and profound cultural influence.
The empire's roots lie in the city of Rome, founded, according to legend, by Romulus in 753 BCE. Over centuries, Rome evolved from a small settlement to a formidable republic, characterized by a complex political system with elected officials and checks on power. However, internal strife, class conflicts, and military ambitions paved the way for the end of the Republic. Julius Caesar’s dictatorship and subsequent assassination in 44 BCE created a power vacuum, leading to a civil war. Octavian, later Augustus, emerged victorious, heralding the Roman Empire’s birth.
Under Augustus, the empire experienced the Pax Romana, a 200-year period of relative peace and stability. Augustus reformed the military, established efficient administrative systems, and initiated grand construction projects. The empire's borders expanded, encompassing territories from Britain to Egypt and from Spain to the Euphrates. Roman legions, renowned for their discipline and engineering prowess, secured and maintained these vast territories, building roads, fortifications, and cities that facilitated control and integration.
The Roman Empire’s society was hierarchical, with a rigid class system. At the top were the patricians, wealthy elites who held significant political power. Below them were the plebeians, free citizens with limited political influence, and the vast numbers of slaves who formed the backbone of the economy. The family unit was central, governed by the paterfamilias, the male head who held absolute authority.
Culturally, the Romans were eclectic, absorbing and adapting elements from the civilizations they encountered, particularly the Greeks. Roman art, literature, and philosophy reflected this synthesis, creating a rich cultural tapestry. Latin, the Roman language, became the lingua franca of the Western world, influencing numerous modern languages.
Roman architecture and engineering achievements were monumental. They perfected the arch, vault, and dome, constructing enduring structures like the Colosseum, Pantheon, and aqueducts. These engineering marvels not only showcased Roman ingenuity but also served practical purposes, from public entertainment to water supply.
Synthetic Fiber Construction in lab .pptxPavel ( NSTU)
Synthetic fiber production is a fascinating and complex field that blends chemistry, engineering, and environmental science. By understanding these aspects, students can gain a comprehensive view of synthetic fiber production, its impact on society and the environment, and the potential for future innovations. Synthetic fibers play a crucial role in modern society, impacting various aspects of daily life, industry, and the environment. ynthetic fibers are integral to modern life, offering a range of benefits from cost-effectiveness and versatility to innovative applications and performance characteristics. While they pose environmental challenges, ongoing research and development aim to create more sustainable and eco-friendly alternatives. Understanding the importance of synthetic fibers helps in appreciating their role in the economy, industry, and daily life, while also emphasizing the need for sustainable practices and innovation.
The Art Pastor's Guide to Sabbath | Steve ThomasonSteve Thomason
What is the purpose of the Sabbath Law in the Torah. It is interesting to compare how the context of the law shifts from Exodus to Deuteronomy. Who gets to rest, and why?
2. A wide variety of IO devices having wide range
of speed and other different characteristics are
available .A slow responding IO device cannot
transfer data when microprocessor issues
instruction for it as it takes some time to get
ready.
Transfers rates of peripherals is usually slower
than the transfer rates of CPU.
Operating modes of peripheral are different
from each other and each must be controlled
so as not to disturb the operation of each
other peripherals connected to CPU.
3. Different types of data transfer techniques are available
which can be broadly divided into two categories:-
MICROPROCESSOR CONTROLLED :- HERE data
transfer is controlled by microprocessor.
Microprocessor is primarily responsible for data transfer
whether from I/o to the CPU or to the memory or vice
versa .
DEVICE CONTROLLED:- Here data transfer is
controlled by IO device . Data is transferred in between
IO device and memory without the intervention of CPU
such a transfer increases rate of transfer and makes the
system more efficient
4. Here data transfer is controlled by
microprocessor. Microprocessor is primarily
responsible for data transfer whether from
I/o to the CPU or to the memory or vice
versa. Microprocessor based scheme is
further divided into two parts:-
PROGRAMMED DATA TRANSFER
SCHEME
INTERRUPT CONTROL DATA TRANSFER
SCHEME
5. Program data transfer scheme is controlled
by the CPU . Data are transferred from an IO
device to the CPU or to the memory through
CPU or vice versa under the control of
programs which are stored in memory.
These programs are executed by the CPU
when an I/O device is ready to transfer
data.
The program data transfer schemes are
employed when small amount of data are to
be transferred.
6.
7. Here also synchronous and asynchronous mode of
transfer is used.
Synchronous Data Transfer :-
Synchronous means ‘at the same time’. The device
Which sends data and the device which received data are
synchronised with the same clock. When the CPU and
IO devices match in speed, Synchronous Data Transfer
technique is employed.
The data transfer with IO devices is performed by executing IN
and OUT instruction. The IN instruction is used to read data
from an input device or input port. The OUT instruction is used
to sends data from CPU to the output device or output port. As
the CPU and the IO devices match in speed, the I/O device is
ready to transfer data when IN or OUT instruction is executes.
The status of the I/O device, whether it is ready or not, is not
examined before the data is transferred.
8. Asynchronous mode of transfer :-
Asynchronous means ‘at irregular intervals’. In this
method data transfer is not based on predetermined
timing pattern. This technique of data transfer is used
when the speed of an I/O device does not match
the speed of the microprocessor.
In this technique the status of the I/O device i.e.
whether the device is ready or not, is checked by the
microprocessor before the data are transferred. The
microprocessor initiates the I/O device to get ready
and then continuously checks the status of I/O device
till the I/O device becomes ready to transfer data.
When I/O device becomes ready, the microprocessor
executes instruction to transfer data.
9. This mode of data transfer is also called
handshaking mode of data transfer
because some signals are exchanged between
microprocessor and I/O devices before the
actual data transfer takes place. Such signals
are called handshake signals.
10. The microprocessor is too busy.
The CPU is wasting time while checking the
flag instead of doing some useful work.
11. The problem with programmed I/O is that
CPU has to wait along time for the I/O
device to be ready for reception or
transmission of data .The CPU while
waiting, must repeatedly interrogate the
status of the I/O device . As a result the
level of the performance of the entire
system is severely degraded.
An alternative is interrupt driven IO
data transfer.
12. In this scheme when the I/O device becomes ready
to transfer data, it sends a high signal to the
microprocessor through a special input line called
an interrupt line. In other words it interrupts the
normal processing sequence of the microprocessor.
On receiving interrupt the microprocessor
completes the current instruction, saves the
contents of the program counter on stack first and
then attends the I/O devices. It take up a
subroutine called ISS (Interrupt Service Subroutine).
It execute ISS to transfer data from or to the I/O
device. Different ISS are to be provided for different
IO devices. After completing the data transfer the
microprocessor returns back to the main program
which it was executing before the interrupt
occurred.
13.
14. The normal operation of the microprocessor
is interrupted.
Itneed to continues monitoring for interrupt
signals.
15. The transfer of data between the mass
storage device and a system memory is often
limited by the speed of microprocessor.
Removing the microprocessor during such a
transfer and letting the peripheral manage
the transfer to or from memory would
improve the speed of transfer and hence will
make the system more efficient. This transfer
technique is called DMA Data Transfer.
16. During DMA transfer microprocessor is idle,
so it has no longer control on the system
buses. A DMA Controller takes over the buses
and manage the transfer directly between the
peripheral and the memory
17.
18. . It is fastest scheme then
Programmed Data
Transfer Scheme and the
microprocessor regains
the control of buses after
data transfer