This document discusses interface definitions and data transfer schemes. It defines an interface as a shared boundary between system elements that allows for input/output communication via signals and protocols. Interface devices meet interface specifications on one side. Data transfer schemes refer to the method of transferring data between a processor and peripheral devices, and include programmed and direct memory access transfers. Programmed transfers involve small data amounts using I/O instructions, while direct memory access allows large block transfers without processor involvement.

1. Introduction to Interfacing Techniques
&
Data Transfer Schemes

2. Interface Definitions
Interface
 a shared boundary between system elements defined by
common physical interconnection characteristics, signal
characteristics, and meanings of interchanged signals.
 is a tool and concept that refers to a point of interaction
between components, and is applicable at the level of
both hardware and software.
 allows a component to function independently while
using interfaces to communicate with other components
via an input/output system and an associated protocol.

3. Cont…
 Interface Device
A device that meets the interface specifications on one
side of an interface.
The term is usually applied to a device through which a
system or equipment works to meet interface
specifications.

4. Interfacing Architecture

5.  Interface Specification
a set of technical requirements that must be met at an
interface.
 Direct Memory Access
A technique that permits a peripheral device to enter
or extract blocks of data from the memory without
involving the central processing unit. In some cases,
the CPU can perform other functions while the data
transfers occur.

6. Components of Interface
Interface
Signals
Interface
Signals
Interfacing
Device
(ID 1)
Interfacing
Device
(ID 2)
Interfacing
Standards
&
Converters
The interfacing devices should make use of standard data transfer schemes
for the efficient exchange of data.

7. 7
I/O interfacing techniques
 I/O devices can be interfaced in two ways
1) I/O mapped I/O
2) Memory mapped I/O

8. 8
I/O interfacing techniques
 Memory mapped I/O
1) In this device add is 16 bit
( A0-A15)
2) MEMR^ and MEWR^
control signals are used
3) Instructions are LDA add,
STA Add, MOV A,M
4) Data trans. Bet reg and
I/O devices
5) No. of I/O devices
interface= 65536
( Theoretically)
 I/O mapped I/P
1) In this device add is 8
bit (A0-A7)
2) IOR^ and IOW^ control
signals are used
3) Instruction are IN Add,
OUT Add
4) Data trans. Bet acc and
I/O devices
5) No. of I/O devices
interface= 256 only

9. Data Transfer Schemes
 refers to the method of data transfer between the
processor and peripheral devices:
microprocessor and memory
microprocessor and I/O devices
memory and I/O devices
For effective data transfer between these devices, the timing
parameters of the devices should be matched.
But most of the devices have incompatible timings.

10. Two Categories:
1. Programmed data
transfer.
2. Direct memory access
data transfer.

11. Programmed Data Transfer
 a memory resident routine
(subroutine) requests the
device for data transfer to
or from one of the
processor register
 scheme is used when a
relatively small amount
data are to be transferred
 usually one byte or word
of data is transferred at a
time
Examples of devices using
parallel data transfer are
ADC,DAC, Hex-keyboard, 7-
segment LED's, etc.

12. 3 Types of Programmed Data Transfer
The scheme can be further classified into the
following:
1. Synchronous data transfer scheme.
2. Asynchronous data transfer scheme.
3. Interrupt driven data transfer scheme.

13. Direct Memory Access (DMA) Data Transfer
 the processor is forced to hold
state by an I/O device until
the data transfer between the
device and the memory is
completed
 the processor does not
execute any instructions
during the hold period
 is used for large block of data
transfer between I/O device
and memory
Typical examples of devices using
DMA are CRT controller, floppy
disk, hard disk, high speed line
printer, etc

14. 3 Types of DMA Data Transfer
The schemes are:
1. Cycle stealing DMA.
2. Block or Burst mode DMA.
3. Demand transfer mode DMA.

15. Types of Data Transfer Schemes

16. PROGRAMCONTROLLED TRANSFER
 the transfer of data is completely under the control of
the microprocessor program
 data transfers can take place synchronously or
asynchronously
an i/o operation takes place only when an i/o instruction is
encountered in the execution of the program
synchronous transfers mean
transfers occurring at the same
time
asynchronous transfers mean
transfers taking place at
irregular intervals
Data transfers between the microprocessor
and the peripherals are primarily asynchronous

17. Program controlled data transfers can take place
under several conditions
 Unconditional
 Polling
 Interrupt
 With ready signal
 With handshake signals
assumes that a peripheral is always available
kept in a loop to check whether data are available
interrupted from its normal execution of program
by an I/O device, when the latter is ready
when peripheral response time is slower than the
microprocessor execution time, READY signal is used
handshake signals are signals exchanged prior to data transfer

18. Synchronous data transfer scheme
 is the simplest of all data
transfer schemes
 the processor does not
check the readiness of
the device
 I/O device or peripheral
should have matched
timing parameters
the mode-O input or output in 8155 or 8255 is an example of synchronous data transfer

19. Asynchronous Data Transfer Schemes
 is employed when the speed
of processor and I/O device
does not match
 the processor ends a request
to the device for read/write
operation
 then the processor keeps on
polling the status of the device
 once the device is ready, the
processor executes a data transfer
instruction to complete the process
 to implement this scheme, the
device should provide a signal
which may be tested by the
processor to ascertain whether it is
ready or not
handshake data transfer without interrupt (mode-l and mode-2) of8155 or 8255 is an example

20. Interrupt Driven DataTransfer Scheme
 is the best method of data f
transfer for effectively
utilizing the processor time
the processor first initiates the I/O device
for data transfer. After initiating the device,
the processor will continue the execution of
instructions in the program. Also at the end of
an instruction the processor will check for a
valid interrupt signal. If there is no interrupt
then the processor will continue the execution.
When the IO device is ready, it will
interrupt the processor. On receiving an
interrupt signal, the processor will complete the
current instruction execution and saves the
processor status in stack. Then the processor
call an interrupt service routine (ISR) to service
the interrupted device.

21. when the processor call
an interrupt service
routine (ISR) to
service the interrupted
device. At the end of
ISR the processor
status is retrieved from
stack and the
processor starts
executing its main
program.

22. PROGRAM CONTROLLED DMA TRANSFERS
In DMA transfer, the microprocessor is forced to hold
on by an I/O device until the data transfer is
complete
In programmed data transfer, a memory resident routine requests the device for
data transfer to and from one of the microprocessor registers
Programmed data are used when relatively small amounts of data are transferred
using relatively slow I/O devices such AID, D/A converters, and peripheral floating
point arithmetic unit.
DMA is preferred when a large block of data is to be
transferred. This scheme is generally employed for
transferring data between the microprocessor and
peripheral mass storage devices like hard disk or a high-
speed line printer.

23. INTERRUPT PROCESS IN MICROCOMPUTERS
8085
FIVE pins on the chip for implementing
the interrupt process
PIN NO Name
6 TRAP
7 RST 7.5
8 RST 6.5
9 RST 5.5
10 INTR.