This document presents a summary of three modes of data transfer - programmed I/O, interrupt-initiated I/O, and direct memory access (DMA). Programmed I/O uses CPU instructions to monitor data transfer between CPU registers and peripherals. Interrupt-initiated I/O uses interrupts to inform the CPU when devices are ready to transfer data. DMA allows devices to access memory directly using bus request/grant signals, leaving the CPU free to perform other tasks. The document compares the three modes and references additional online sources for information.

1. 3rd Assessment
on
Modes of Data Transfer.
Presented by
PRATIK KADAM
URN: 2020-M-02101997
Under the Supervision of
Professor
Amit Sundas
COMPUTER ARCHITECTURE. (CSC511)

2. Outlines
• Introduction
• Programmed I/O
• interrupt initiated I/O
• Direct Memory Access
• Comparison
• References

3. Introduction :
• Binary information received from an external device is usually stored in memory for later
processing. Information transferred from the central computer into an external device originates
in the memory unit.
• The CPU merely executes the I/O instructions and may accept the data temporarily, but the
ultimate source or destination is the memory unit.
• Data transfer between the central computer and I/O devices may be handled in a variety of
modes.
• Some modes use the CPU as an intermediate path; others transfer the data directly to and from
the memory unit.

4. Introduction Contd..
• Some modes use the CPU as an intermediate path; others transfer the data directly to and from
the memory unit.
• Data transfer to and from peripherals may be handled in one of three possible modes:
 Programmed I/O
 Interrupt-initiated I/O
 Direct memory access (DMA)

5. Programmed I/O :
 These operations are a result of I/O instructions written in the computer program. Data transfer is
initiated by an instruction in the program .
 Usually the data transfer data between CPU register and peripheral has to be constantly
monitored. Once a data transfer is initiated , the CPU is required to monitor the interface to see
when a transfer can again be made.
Application of Programmed I/O:
Useful in small low speed computers.
Used in systems that are dedicated to monitor a device continuously.
Used in the data register.
Used to check the status of the flag bit and branch.

6. Programmed I/O :
Fig 1.1 Programmed I/O

7. Interrupt Initiated I/O :
 This can be avoided by using an interrupt facility and special commands to inform the interface
to issue an interrupt request signal when the data are available from the device. Meanwhile , The
interfaces keeps monitoring The device.
 When the interface determines that the device is ready for data transfer, it generates an interrupt
request to the computer.
SERVICES ROUTINES OF INTERRUPT INITIATED I/O :
 Service routines of interrupt initiated I/O can be chosen in two ways.
 vectored interrupt.
 Non-vectored interrupt.

8. Interrupt Initiated I/O :
Fig 2.1 Interrupt Initiated I/O

9. Direct Memory Access(DMA) :
 The interface transfer data into and out of the memory unit through the memory bus. The CPU
initiates the transfer of supplying the interface with the starting address and the number of words
needed to be transferred and then proceed to execute other tasks . When the request is granted by
the memory controller, the DMA transfer the data directly into memory.
Application of DMA.
 During DMA transfer, the CPU is idle and has no control of the memory buses. The buses can be
disabled by using two special control signals.
 Bus Request (BR)
 Bus Grant(BG)

10. Direct Memory Access(DMA) :
Fig 3.1
Bus Signals for DMA

11. Comparison:
Programmed I/O Interrupt Initiated I/O Direct Memory Access
Data transfer is initiated by the means of
instructions stored in the computer
program.
The I/O transfer is initiated by the
interrupt command issued to the CPU.
Direct Memory Access (DMA) means
CPU grants I/O module authority to read
from or write to memory without
involvement.
The CPU stays in the loop to know if the
device is ready for transfer and has to
continuously monitor the peripheral
device.
There is no need for the CPU to stay in
the loop as the interrupt command
interrupts the CPU when the device is
ready for data transfer.
As CPU is not involved in any means this
the fastest input and output mode.
Table 1: comparison

12. References
URL References
Geeks for Geeks
https://www.geeksforgeeks.org/io-interface-interrupt-dma-mode
Upscfever.com
https://upscfever.com/upsc-fever/en/gatecse/en-gatecse-chp164.html