Introduction Different modes of data transfer Programmed I/O Interrupt initiated I/O Direct memory access (DMA)

1. MODES OF TRANSFERS
IN
COMPUTER

2. OVERVIEW
Introduction
Different modes of data transfer
o Programmed I/O
o Interrupt initiated I/O
o Direct memory access (DMA)

3.  Binary information received from external device usually stored in memory
 Information transferred from the central computer into an external device
flows from the memory
 Data transfer between the central computer and input and output devices
may be handled in a variety of modes
Introduction to data transfers

4. DIFFERENT MODES OF DATATRANSFER
 Programmed I/O
 Interrupt initiated I/O
 Direct memory access (DMA)

5. PROGRAMMED I/O
 Results of I/O instructions written in the computer program
 Data transfer initiated by an instruction in the program
 CPU register Peripheral Device
 CPU Memory
 The peripheral has to be constantly monitored.
 Once a data transfer is initiated, the CPU is required to monitor the
interface to see when a transfer can again be made.
Data Transfer
Data Transfer

6. APPLICATIONS OF PROGRAMMED
I/O METHOD
 In small low speed computers
 In systems that are dedicated to monitor a device continuously
 In the data register
 To check the status of the flag bit and branch

7. INTERRUPT INITIATED I/O
 Can be avoided by using an interrupt facility and special commands
to inform the interface to issue an interrupt request signal when the
data are available from the device
 CPU can proceed to execute another program.
 Interfaces monitor the device- when interface determines device is
ready for data transfer, it generates an interrupt request to computer

8. DIRECT MEMORYACCESS (DMA)
 Data transfer by interface into and out of the memory unit via memory bus
 CPU initiates transfer of supplying the interface with the starting address and
the number of words needed to be transferred and then proceed to execute
other tasks
 When request is granted by memory controller, DMA transfers the data directly
into memory.
 CPU delays its memory access operation to allow the direct memory I/O
transfer

9. DIRECT MEMORYACCESS (DMA)
 Idle CPU
 No control of the memory buses
 The buses can be disabled by using two special control signals-
o Bus request (BR)
o Bus Grant (BG)

10. CONCLUSION
Data transfers to-and-fro the memory take various digital
forms executed via instruction sets . . .

11. THANK
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