computer

1. Chapter Five
Input/output Organization.

2. Input/Output Subsystem
 The I/O subsystem of a computer provides an
efficient mode of communication between the
central system and the outside environment.
 Peripheral Devices
 Input or output devices that are connected to
computer are called peripheral devices.
 These devices are designed to read information
into or out of the memory unit upon command
from the CPU and are considered to be the part of
computer system.

3. There are three types of peripherals:
• Input peripherals : Allows user input, from the
outside world to the computer. Example:
Keyboard, Mouse etc.
• Output peripherals: Allows information output,
from the computer to the outside world. Example:
Printer, Monitor etc
• Input-Output peripherals: Allows both
input(from outside world to computer) as well as,
output(from computer to the outside world).
Example :storage devices (which partake of the
characteristics of the first two) .

4. Interfaces
• Interface is a shared boundary between two
separate components of the computer system
which can be used to attach two or more
components to the system for communication
purposes.
• Provides a method for transferring information
between internal storage (such as memory and
registers) and external I/O devices.
•Resolves the differences between the computer and
peripheral devices

5. I/O Interface
• Input Output Interface provides a method for
transferring information between internal storage and
external I/O devices.
• Peripherals connected to a computer need special
communication links for interfacing them with the
central processing unit.
• The purpose of communication link is to resolve the
differences that exist between the central computer and
each peripheral.
• They provide a method for transferring information
between internal processor bus and input-output
devices.

6. I/O Bus and Interface Modules

7. I/O Versus Memory Bus
• Memory Bus is for information
transfers between CPU and the Main Memory.
• I/O Bus is for information transfers between
CPU and I/O devices through their I/O
interface.

8. Physical organization
• Many computers use a common single bus
system for both memory and I/O interface
units.
• Use one common bus but separate control lines
for each function.
• Some computer systems use two separate
buses one to communicate with memory and
the other with I/O interfaces.

9. Cont…
• i.e There are 3 ways that computer buses can
be used to communicate with memory and I/O.
1. Use two Separate buses , one for memory and
other for I/O.
2 . Use one common bus for both memory and
I/O but separate control lines for each.
3. Use one common bus for memory and I/O
with common control lines.

10. Cont…
• The I/O Bus consists of data lines, address
lines and control lines.
• Like the I/O bus, the memory bus contains
data, address and read/write control lines.
• The I/O bus from the processor is attached to
all peripherals interface.
• To communicate with a particular device, the
processor places a device address on address
lines.

11. Data transfer modes
• There are three modes of data transfer.
i. Programmed I/O
ii. Interrupt-Initiated I/O
iii. Direct Memory Access (DMA)

12. Programmed I/O
• In this mode of data transfer the operations are the
results in I/O instructions which is a part of computer
program.
• Each data transfer is initiated by a instruction in the
program.
• Normally the transfer is from a CPU register to
peripheral device or vice-versa.
• Once the data is initiated the CPU starts monitoring the
interface to see when next transfer can made.
• The instructions of the program keep close tabs on
everything that takes place in the interface unit and the
I/O devices

13. Programmable Interface
• Information in each port can be assigned a
meaning depending on the mode of operation of
the I/O device.
→ eg: Port A = Data; Port B = Command; etc..
• CPU initializes(loads) each port by transferring a
byte to the Control Register.
→ CPU can define the mode of operation of each
port.
→By changing the bits in the control register, it is
possible to change the interface characteristics.

14. Drawback of the Programmed I/O :
• The main drawback of the Program Initiated
I/O was that the CPU has to monitor the units
all the times when the program is executing.
• Thus the CPU stays in a program loop until
the I/O unit indicates that it is ready for data
transfer.
• This is a time consuming process and the CPU
time is wasted a lot in keeping an eye to the
executing of program.

15. Interrupt-Initiated I/O
• An interrupt is a signal from a device attached to a
computer or from a program within the computer that
causes some disturbance for the Running Process and figure
out what to do next.
• In this method an interrupt facility command is
used to inform the device about the start and end
of transfer.
• In the meantime the CPU executes other
program.
• When the interface determines that the device is
ready for data transfer it generates an Interrupt
Request and sends it to the computer.

16. C0NT…
• When the CPU receives such signal, it may
temporarily stops the execution of the program
and branches to a service program to process the
I/O transfer and after completing it returns back to
task, what it was originally performing.
• Which means, After the interrupt signal is sensed,
the computer either resumes running the program
it was running or begins running another program.

17. Interrupt Processing:
• Processor checks for interrupt by an interrupt
signal.
• If no interrupt, CPU will fetch next instruction
• If interrupt pending:
— Suspend execution of current program
— Save context
— Set PC to start address of interrupt handler
routine
— Process interrupt
— Restore context and continue interrupted
program

18. Priority Interrupt
• Priority determines which interrupt is to be served
first when two or more requests are made
simultaneously.
• Also it determines which interrupts are permitted
to interrupt the CPU while another is being
serviced.
• Higher priority interrupts can make requests
while servicing a lower priority interrupt.
• Devices with high speed transfer are given higher
priority and slow devices are given lower priority.

19. Direct Memory Access (DMA):
• In the Direct Memory Access (DMA) the
interface transfer the data into and out of the
memory unit through the memory bus.
• The transfer of data between a storage device
such as magnetic disk and memory is often
limited by the CPU.
• Removing the CPU from the path and letting the
peripheral device manage the memory buses
directly would improve the speed of transfer.
• This transfer technique is called Direct Memory
Access(DMA).

20. Cont…
• During the DMA transfer, the CPU is idle and
has no control of the memory buses.
• A DMA Controller takes over the buses to
manage the transfer directly between the I/O
device and memory.

21. ASYNCHRONOUS DATA TRANSFER
Synchronous and Asynchronous Operations
1. Synchronous Operations:- All devices derive the timing
information from clock line.
2. Asynchronous Operations :- No common clock
Asynchronous data transfer :-
Asynchronous data transfer between two independent units requires
that
control signals be transmitted between the communicating units to
indicate the time at which data is being transmitted

22. Two Asynchronous Data Transfer methods :-
1. Strobe Pulse:- It is supplied by one unit to indicate the other
unit when the transfer has to occur.
2. Handshaking :- A control signal is accompanied with each
data being transmitted to indicate the presence of data.
3. The receiving unit responds with another control signal to
acknowledge receipt of data

23. Asynchronous Data Transfer
 The internal operations in a digital system are synchronized by means of clock
pulses supplied by a common pulse generator.
 Clock pulses are applied to all registers within a unit and all data transfers among
internal registers occur simultaneously during the occurrence of a clock pulse.
 Two units, such as a CPU and an I/O interface, are designed independently of each
other.
 If the registers in the interface share a common clock with the CPU registers, the
transfer between the two units is said to be synchronous.
 In most cases, the internal timing in each unit is independent from the other in that
each uses its own private clock for internal registers.
 In that case, the two units are said to be asynchronous to each other.
 Asynchronous data transfer between two independent units requires that control
signals be transmitted between the communicating units to indicate the time at
which data is being transmitted.

24.  Another method commonly used is to accompany each data item being
transferred with a control signal that indicates the presence of data in the bus.
 The unit receiving the data item responds with another control signal to
acknowledge receipt of the data.
 This type of agreement between two independent units is referred to as
handshaking.
 In the general case we consider the transmitting unit as the source and the
receiving unit as the destination.
 For example, the CPU is the source unit during an output or a write transfer
and it is the destination unit during an input or a read transfer.
 It is customary to specify the asynchronous transfer between two
independent units by means of a timing diagram that shows the timing
relationship that must exist between the control signals and the data in the
buses. The sequence of control during an asynchronous transfer depends on
whether the transfer is initiated by the source or by the destination unit.

25. There are two types of asynchronous data transmission methods:-
1. Strobe control
2. Handshaking

26.  Strobe Control
 This method of asynchronous data transfer uses a single control line to
time each transfer.
 The strobe may be activated by the source or the destination unit.
i) Source Initiated Data Transfer:
 The bus carries the information from source to destination. The strobe is a
single line. The signal on this line informs the destination unit when a data
word is available in the bus.
 The strobe signal is given after a brief delay, after placing the data on the
data bus.
 A brief period after the strobe pulse is disabled the source stops sending the
data.

28. (ii) Destination Initiated Data Transfer:
In this case the destination unit activates the strobe pulse
informing the source to send data.
The source places the data on the data bus. The transmission is
stopped briefly after the strobe pulse is removed.
The disadvantage of the strobe is that the source unit that
initiates the transfer has no way of knowing whether the
destination unit has received the data or not.
Similarly if the destination initiates the transfer it has no way of
knowing whether the source unit has placed data on the bus or
not.
This difficulty is solved by using hand shaking method of data
transfer.

30. HANDSHAKING
Strobe Methods
Source-Initiated
The source unit that initiates the transfer has
no way of knowing whether the destination unit
has actually received data.
Destination-Initiated
The destination unit that initiates the transfer
no way of knowing whether the source has
actually placed the data on the bus.
To solve this problem, the HANDSHAKE method
introduces a second control signal to provide a Reply
to the unit that initiates the transfer.
Asynchronous Data Transfer

31. Handshaking
• Handshaking provides a high degree of
flexibility and reliability because the successful
completion of a data transfer relies on active
participation by both units.
• If one unit is faulty, data transfer will not be
completed- Can be detected by means of a
timeout mechanism.
• A control signal is accompanied with each data
transmission to indicate the presence of data.
• The receiving unit responds with another control
signal to acknowledge receipt of the data.

32. Source Initiated Transfer using
Handshaking:
• The sequence of events shows four possible states
that the system can be at any given time.
• The source unit initiates the transfer by placing
the data on the bus and enabling its data valid
signal.
• The data accepted signal is activated by the
destination unit after it accepts the data from the
bus.
• The source unit then disables its data accepted
signal and the system goes into its initial state.

33. Source Initiated transfer diagram

34. Destination Initiated Transfer Using
Handshaking:
• The name of the signal generated by the
destination unit has been changed to ready for
data to reflects its new meaning.
• The source unit in this case does not place data on
the bus until after it receives the ready for data
signal from the destination unit.
• From there on, the handshaking procedure follows
the same pattern as in the source initiated case.
• The only difference between the Source Initiated
and the Destination Initiated transfer is in their
choice of Initial sate.

35. Destination-Initiated Transfer Using
Handshake diagram

36. Asynchronous serial transfer
• each bit of message is sent a sequence at a time,
and binary information is transferred only when it
is available.
• When there is no information to be transferred,
line remains idle.
• In this technique each character consists of three
points :
i. Start bit
ii. Character bit
iii. Stop bit

37. Cont…
• Start Bit- First bit, called start bit is always zero
and used to indicate the beginning character.
• Stop Bit- Last bit, called stop bit is always one
and used to indicate end of characters. Stop bit is
always in the 1- state and frame the end of the
characters to signify the idle or wait state.
• Character Bit- Bits in between the start bit and
the stop bit are known as character bits. The
character bits always follow the start bit.

38. diagram

39. • The end