This document discusses various data transfer schemes between I/O devices and memory in a computer system. It describes DMA which allows direct transfer of data from I/O to memory without CPU involvement. It also covers programmed I/O which uses the CPU to control data transfers for small amounts of data. Asynchronous and synchronous transfer methods are explained along with handshaking techniques for asynchronous transfers between devices running at different speeds. Interrupt-driven I/O is also summarized which uses interrupt requests from I/O devices to signal the CPU to service a transfer.

1. Data transfer
Schemes
By,
Kaavya.b
Holy Cross College,Trichy 2

3. DMA
• CPU does not participate.
• Data are directly transferred from an
I/O to the memory.
• It is controlled by the I/O device or a
DMA controller.
• This scheme is employed when large
amount of data are to be transferred.

5. Merits and Uses
• It is a faster scheme.
• It is used to transfer data from
mass storage devices such as hard
disks,optical disks and also for
high speed printers.

6. Burst Mode
• The I/O device withdraws the
DMA request only after all the
data bytes have been transferred.
• A block of data is transferred.
• It is used in magnetic disks drive.

7. Cycle Stealing Technique
• A long block of data is transferred
by a sequence of DMA cycles.
• After transferring one byte or
several bytes the I/O device
withdraws DMA request.
• This method reduces interference
in CPU’s activities.

8. • Interference can be eliminated with an
interfacing ciruitry which can steal bus
cycle for DMA data transfer only when
the CPU is not using the system bus.
• I/O devices must have
1. registers to store memory
addresses & byte count.
2. electronic ciruitry to produce
control signals.

9. Programmed DTS
• This is controlled by the CPU.
• Data are transferred from an I/O device
to the memory through the CPU.
• The programs are executed by the CPU
when an I/O device is ready to transfer
data.
• This scheme is employed when small
amount of data are to be transferred.

10. Synchronous Data transfer
• Synchronous means “at the same
time”.
• The device which sends data and the
device which receives data are
synchronised with the same clock.
• CPU and the I/O devices must match
in speed.

12. • The status of the I/O device whether
it is ready or not is not examined
before data are transferred.
• But this technique is used only with
compatible memory devices.
• The I/O devices compatible with
microprocessors in speed are not
available.

13. Asynchronous Data Transfer
• Asynchronous means “at irregular intervals”.
• DT is not based on perdetermined timing
pattern.
• It is used when the speed of an I/O device
does not match the speed of the
microprocessor.
• The status of the I/O device is checked by the
microprocessor before the data are
transferred.

14. HANDSHAKING MODE:
• The microprocessor initiates the I/O
device to get ready .
• Then continously checks the status of the
I/O device till the I/O device becomes
ready to transfer data.
• When I/O device becomes ready, the
microprocessor sends instructions to
transfer data.

15. HANDSHAKING SIGNALS:
• The microprocessor issues an
initiating signal to the I/O device
to get ready.
• When I/O device becomes ready it
sends signals to the processor to
indicate that it is ready.

17. DEMERITS
•It is used for slow I/O
devices.
•The precious time of the
microprocessor is wasted
in waiting.

19. • The microprocessor sends a S/C to the A/D
converter.
• When the conversion is over the A/D
converter makes E/C high.
• The microprocessor goes on checking E/C till it
becomes high.
• When E/C becomes high, the microprocessor
issues instructions for data transfer.
• Eg: Keyboard interfaced to a microprocessor
through a port.

20. Interrupt Driven DT
• The microprocessor initiates an I/O
device to get ready and then it executes
its main program instead of remaining in
a program loop to check the status of the
I/O device.
• When the I/O device becomes ready to
transfer data, it sends a high signal to the
microprocessor through a special input
line called an interrupt line.

21. • On receiving an interrupt the microprocessor
completes the current instruction at hand and
then attends the I/O device.
• It saves the contents of the program counter
on the stack first and then takes up a
subroutine called ISS(interrupt service
subroutine)
• After completing the data transfer the
microprocessor returns to the main program
where it was interrupted.

22. Merits and Demerits
•Used for slow I/O devices.
•Efficient technique
•Precious time of the
microprocessor is not wasted
in waiting while an I/O device
is getting ready.

24. • The microprocessor sends S/C to the A/D
converter.
• After converting analog to digital signal
A/D converter makes an E/C high.
• The E/C signal is connected to an
interrupt line of the microprocessor.
• When interrupt line goes high,
microprocessor will transfer data from
the A/D converter.

25. Multiple Interrupts

26. One Device connected to each level ofinterrupt:
• When a device interrupts microprocessor, it
immediately knows which device has
interrupted.
• The processor automatically transfers its
program to a specific memory location that
has been assigned to the interrupt line.
• It executes ISS for the device which has
interrupted.
• Such an interrupt scheme is known as
vectored interrupt.