The document describes an AXI_PCIEX1 module that acts as a PCI Express to AXI bridge, allowing a system with an embedded AXI bus to connect to an external PCI Express bus. The module is compliant with DO-254 guidance for critical applications and has a low gate count and latency. It supports PCIe 1.0 at 2.5 Gbps on one lane and interfaces with AXI4 at 32 bits. The module is optimized for reliability and error reporting. DMAP provides Verilog RTL, verification testbenches, and all required certification documentation.