CLASS PRESENTATION
Topic-BUS
Mohammad Asif Iqbal
Assistant Professor,
Deptt of ECE,
JETGI, Barabanki
LET’S REVISE:-WHAT WE HAVE STUDIED….
1 BUS (definition)
2 Generic BUS structure
3 BUS characteristic
4 Increasing the BUS bandwidth.
5 Advantage & disadvantage of BUS5
WHAT WE WILL STUDY IN THIS CLASS….
1 Parallel and Serial Communication
2 Synchronous and Asynchronous BUS
3 Basic Protocol Concepts
4 BUS Arbitration
PARALLEL COMMUNICATION. oThat is multiple data control and
possibly power wires with an effective data
transfer unit is 1 bit per wire.
oHigh data throughput with short distances.
oTypically used when the connecting devices
are on the same IC or same board.
oHigher cost, bulky
oBUS must be kept short.
oLong parallel wires result in high
captaincies value which require
more time to charge/discharge
oData misalignment between wires
increases as the length increases.
SERIAL COMMUNICATION.
oThat is single data wire, possibly also
control and power wires
oEffective data transfer unit is 1 bit at a time.
oHigh data throughput with long distances.
oCheaper, less bulky
oMore complex interfacing logic and
communication protocol
oSender needs to decompose words into
bits
oReceiver needs to recompose bits into
words.
oControl signal often send on the same wire
as data increasing protocol complexity.
SYNCHRONOUS BUS.
oIncludes a clock in the control line.
oA fixed protocol for communication that is
relative to the clock.
oMost of the processor-memory BUSes are
synchronous BUS.
oAdvantages: very little logic and can run very
fast.
oDisadvantages:
oEvery device on the BUS must run
on the same clock rate.
oTo avoid the clock skew they cant
be long if they are fast.
ASYNCHORONUS BUS.
oIt is not clocked.
oIt can accommodate a wide
verity of devices.
oIt can be lengthened without
worrying abut clock skew.
oIt requires a handshaking
protocol.
BASIC PROTOCAL CONCEPT.
oA BUS transaction include two parts:
oIssuing the command (and address).- request
oTransferring the data.-action
oMaster is the one who starts the BUS transaction by:
oIssuing the command and address.
oSlave is the one who responds to the address by:
oSending data to the master if the master ask for the data
oReceiving data from the master if the master wants to send data.
BASIC TRANSACTION PROTOCAL
.
A STROBE/HANDSHAKE COMBINATION.
WHEN TO USE HANDSHAKE.
oWhen response time
cant be guaranteed in
advance.
oData dependent delay
oComponent variations.
BUS ARBITRATION.
oOne of the most important issue in BUS design:
oHow is the BUS reserved by a device that whishes to use it.
oMaster-slave arrangement.
oOnly the bus master can control access to the BUS:
It initiate and control all BUS request.
A slave responds to read and write requests.
oThe simplest system
processor is the only BUS master
All BUS request must be controlled by the processor
Major drawback: the processor is involved in every transaction.
ARBITRATION OF MULTIPLE POTENTIAL BUS MASTERS.
oBUS arbitration scheme usually try to balance two factors.
oBUS priority:-the highest priority device must be served first.
oFairness: even the lowest priority device should never be completely
locked out by BUS.
oBUS arbitration scheme can be divided into for classes.
oThe DAISY CHAIN.
oCentralized parallel arbitration.
The DAISY CHAIN.
CENTRALIZED PARALLEL ARBITRATION.
POLLING...
POLLING...
WHAT NEXT??
SOMETHING AWESOME….
SOME PRACTICAL EXPOSURE OF
TOPICS WE HAVE STUDIED…
REGISTER AND BUS TRANSFER
TRANSFER FROM BUS TO A DESTINATION REGISTER.
THANK YOU!

Bus

  • 1.
    CLASS PRESENTATION Topic-BUS Mohammad AsifIqbal Assistant Professor, Deptt of ECE, JETGI, Barabanki
  • 2.
    LET’S REVISE:-WHAT WEHAVE STUDIED…. 1 BUS (definition) 2 Generic BUS structure 3 BUS characteristic 4 Increasing the BUS bandwidth. 5 Advantage & disadvantage of BUS5
  • 3.
    WHAT WE WILLSTUDY IN THIS CLASS…. 1 Parallel and Serial Communication 2 Synchronous and Asynchronous BUS 3 Basic Protocol Concepts 4 BUS Arbitration
  • 4.
    PARALLEL COMMUNICATION. oThatis multiple data control and possibly power wires with an effective data transfer unit is 1 bit per wire. oHigh data throughput with short distances. oTypically used when the connecting devices are on the same IC or same board. oHigher cost, bulky oBUS must be kept short. oLong parallel wires result in high captaincies value which require more time to charge/discharge oData misalignment between wires increases as the length increases.
  • 5.
    SERIAL COMMUNICATION. oThat issingle data wire, possibly also control and power wires oEffective data transfer unit is 1 bit at a time. oHigh data throughput with long distances. oCheaper, less bulky oMore complex interfacing logic and communication protocol oSender needs to decompose words into bits oReceiver needs to recompose bits into words. oControl signal often send on the same wire as data increasing protocol complexity.
  • 6.
    SYNCHRONOUS BUS. oIncludes aclock in the control line. oA fixed protocol for communication that is relative to the clock. oMost of the processor-memory BUSes are synchronous BUS. oAdvantages: very little logic and can run very fast. oDisadvantages: oEvery device on the BUS must run on the same clock rate. oTo avoid the clock skew they cant be long if they are fast.
  • 7.
    ASYNCHORONUS BUS. oIt isnot clocked. oIt can accommodate a wide verity of devices. oIt can be lengthened without worrying abut clock skew. oIt requires a handshaking protocol.
  • 8.
    BASIC PROTOCAL CONCEPT. oABUS transaction include two parts: oIssuing the command (and address).- request oTransferring the data.-action oMaster is the one who starts the BUS transaction by: oIssuing the command and address. oSlave is the one who responds to the address by: oSending data to the master if the master ask for the data oReceiving data from the master if the master wants to send data.
  • 9.
  • 10.
  • 11.
    WHEN TO USEHANDSHAKE. oWhen response time cant be guaranteed in advance. oData dependent delay oComponent variations.
  • 12.
    BUS ARBITRATION. oOne ofthe most important issue in BUS design: oHow is the BUS reserved by a device that whishes to use it. oMaster-slave arrangement. oOnly the bus master can control access to the BUS: It initiate and control all BUS request. A slave responds to read and write requests. oThe simplest system processor is the only BUS master All BUS request must be controlled by the processor Major drawback: the processor is involved in every transaction.
  • 13.
    ARBITRATION OF MULTIPLEPOTENTIAL BUS MASTERS. oBUS arbitration scheme usually try to balance two factors. oBUS priority:-the highest priority device must be served first. oFairness: even the lowest priority device should never be completely locked out by BUS. oBUS arbitration scheme can be divided into for classes. oThe DAISY CHAIN. oCentralized parallel arbitration.
  • 14.
  • 15.
  • 16.
  • 17.
  • 18.
    WHAT NEXT?? SOMETHING AWESOME…. SOMEPRACTICAL EXPOSURE OF TOPICS WE HAVE STUDIED…
  • 20.
  • 21.
    TRANSFER FROM BUSTO A DESTINATION REGISTER.
  • 22.