The document discusses three levels of contamination reduction in semiconductor manufacturing: Level 1 involves keeping clean rooms free of particles through strict air purity standards. Level 2 is wafer cleaning to remove unwanted contaminants from wafer surfaces. Level 3 is gettering, where silicon dioxide precipitates or damage to wafer backs effectively "trap" contaminant particles within the wafer bulk. Gettering helps prevent particles from reaching the device layer. The document also models how particle contamination affects yield and the need for extremely low defect densities with future technology nodes.

1. Contamination Reduction:
Clean Rooms, Wafer Cleaning
and Gettering

5. Level 1 Contamination Reduction: Clean Factories
Class X means that in each cubic foot of air in the factory, there
are less than X total particles of size greater than 0.5 µm.

6. Level 1 Contamination Reduction: Clean Factories

7. Level 2 Contamination Reduction: Wafer Cleaning

8. Level 2 Contamination Reduction: Wafer Cleaning

9. Level 2 Contamination Reduction: Wafer Cleaning

10. Level 2 Contamination Reduction: Wafer Cleaning

11. Level 3 Contamination Reduction: Gettering

12. Level 3 Contamination Reduction: Gettering

13. Level 3 Contamination Reduction: Gettering

14. Level 3 Contamination Reduction: Gettering

15. Level 3 Contamination Reduction: Gettering
• “Trap” sites can be created by SiO2 precipitates (intrinsic
gettering), or by backside damage (extrinsic gettering).
• In intrinsic gettering, CZ silicon is used and SiO2 precipitates
are formed in the wafer bulk through temperature cycling at
the start of the process.
SiO2 precipitates (white dots)
in bulk of wafer.

16. Modeling Particle Contamination and Yield

17. Modeling Particle Contamination and Yield

18. Modeling Particle Contamination and Yield

19. Modeling Particle Contamination and Yield

20. Modeling Particle Contamination and Yield

21. Modeling Particle Contamination and Yield

22. Modeling Particle Contamination and Yield
• Vertical lines are estimated chip sizes (from the
ITRS).
• Note that defect densities will need to be
extremely small in the future to achieve the high
yields required for economic IC manufacturing.
• (See the starting slide for particle defect
densities.)

23. Modeling Wafer Cleaning

24. Modeling Wafer Cleaning

25. Modeling Wafer Cleaning
• The strongest oxidants are at the bottom (H2O2 and O3). These reactions
go to the left grabbing e-
and forcing (6) to the right.
• Fundamentally RCA clean works by using H2O2 as a strong oxidant.

26. Modeling Gettering

27. Modeling Gettering

28. Modeling Gettering

29. Summary of Key Ideas

30. Summary of Key Ideas