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Execution Unit &
Addressing Modes of
8086
Dr.Ajay Singh Raghuvanshi
Ajay Singh Raghuvanshi, IIITA 1
VARIOUS REGISTERS IN EU
Ajay Singh Raghuvanshi, IIITA 2
FLAG REGISTER
 It is a 16-bit status register within the EU of
8086.
 There are nine flags in 8086.
 Six of these are status flags and three are
control flags.
 Status Flags are used to indicate some
condition produced by an instruction
 Control Flags are used to control certain
operation of the processor
Ajay Singh Raghuvanshi, IIITA 3
8086 FLAG REGISTER
Ajay Singh Raghuvanshi, IIITA 4
STATUS FLAGS
 CF- Carry Flag It is set if carry out of MSB.
 PF- Parity Flag It is set if result has even parity.
 AF- Auxiliary Flag Used for BCD.
 ZF- Zero Flag It is set if result is 0.
 SF- Sign Flag It is set if result is negative.
 OF- Overflow Flag It is set if signed result is
out of the range.
Ajay Singh Raghuvanshi, IIITA 5
CONTROL FLAGS
 TF-Single step Trap Flag It is to be set if
single step mode (debugging) is needed.
 IF- Interrupt Flag It is to be set, for
allowing or prohibiting interruption
request.
 DF- Direction Flag If set, string
instruction automatically decrements the
address (string data transfers proceed
from high address to the low address.
Ajay Singh Raghuvanshi, IIITA 6
POINTER AND INDEX
REGISTERS
 There are two pointer and two index
registers in the EU of 8086.
 These registers are used to store the
offset addresses of memory locations
relative to the segment registers.
Ajay Singh Raghuvanshi, IIITA 7
POINTER REGISTER
Two pointer registers are :
 Stack pointer – The value in the SP
always represents the offset of the next
stack location that can be accessed.
 Base pointer – It also represents an offset
relative to SS register but is employed in
the based addressing mode of 8086.
Ajay Singh Raghuvanshi, IIITA 8
INDEX REGISTER
Two index registers are:
 Source index (SI)- It is used to store an
offset address for source operand.
 Destination index (DI)- It is used for
storage of an offset address for the
destination operand.
Ajay Singh Raghuvanshi, IIITA 9
ADDRESSING MODES OF
8086
 The addressing modes available in Intel 8086
are:
1. Register Addressing
2. Immediate Addressing
3. Direct Addressing
4. Register Indirect Addressing
5. Based Relative Addressing
6. Indexed Relative Addressing
7. Based Indexed Relative Addressing
Ajay Singh Raghuvanshi, IIITA 10
The MOV instruction
Ajay Singh Raghuvanshi, IIITA 11
MOV AX , BX
SourceDestination
Register Addressing Mode
 With the Register Addressing mode the operand to
be accessed is specified as residing in an internal
register of the 8086.
 Examples
 Both the source and the destination operands
have been specified as the contents of internal
registers of the 8086
Ajay Singh Raghuvanshi, IIITA 12
Assembly Language Size Operation
MOV AL, BL 8-bits Copies BL into AL
MOV CH, CL 8-bits Copies CL into CH
MOV AX, CX 16-bits Copies CX into AX
MOV SP, BP 16-bits Copies BP into SP
MOV BX, ES 16-bits Copies ES into BX
MOV ECX, EBX 32-bits Copies EBX into ECX
MOV ESP, EDX 32-bits Copies EDX into ESP
MOV ES, DS — Not allowed (segment-to-segment)
MOV BL, DX — Not allowed (mixed sizes)
Immediate Addressing Mode
 If a source operand is part of the instruction
instead of the contents of a register or
memory location, it represents what is called
the immediate operand and is accessed
using immediate addressing mode. Typically
immediate operand represents constant data
Immediate operands can be either a byte or
word of data
 Example: MOV AL , 15H (2 bytes) MOV CX,
4AC2H (3bytes).
Ajay Singh Raghuvanshi, IIITA 13
Direct Addressing Mode
 Direct addressing differs from immediate
addressing, that the locations following the
instruction op-code hold an “Offset” which is a 16-
bit offset of the storage location of the operand from
the current value in the data segment (DS) register.
offset is combined with the contents of DS in the
BIU to produce the physical address of the operand.
 Example: MOV CX , [1000]
 This stands for move the contents of the memory
location, which is offset by 1000H from the current
value in DS into internal register CX
CX [DS*10+1000]H
Ajay Singh Raghuvanshi, IIITA 14
Register Indirect Addressing Mode
 Register indirect addressing is similar to direct addressing, that an
effective address is combined with the contents of DS to obtain a
physical address. However it differs in a way that the offset is
specified. Here offset resides in either a pointer register or an index
register within the 8086.The pointer register can be either a base
register BX or a base pointer register BP and the index register can
be source index register SI or the destination index register DI
 Example MOV AX , [SI]
 This instruction moves the contents of the memory location offset by
the value of offset in SI from the current value in DS to the AX
register.
Ajay Singh Raghuvanshi, IIITA 15
AX [DS*10+[SI]]H
Based Addressing Mode
 In the based addressing mode, the physical address of
the operand is obtained by adding a direct or indirect
displacement of the contents of either base register BX
or base pointer register BP and the current value in DS
and SS respectively.
 Example : MOV [BX + SI] , AL
 This instruction uses base register BX and direct
displacement SI to derive the EA of the destination
operand. The based addressing mode is implemented by
specifying the base register in the brackets followed by a
period and direct displacement .The source operand is
located in the byte accumulator AL
Ajay Singh Raghuvanshi, IIITA 16
Indexed Addressing Mode
 Indexed addressing mode works identically to
the based addressing but it uses the contents
of the index registers instead of BX or BP, in
the generation of the physical address.
 Example MOV AL , [SI+10]
 The source operand has been specified using
direct index addressing. The notation this
time is such, which is a direct displacement,
prefixes the selected index register, SI.
Ajay Singh Raghuvanshi, IIITA 17
Based Indexed Addressing Mode
 Combining the based addressing mode and the
indexed addressing mode together results in a
new, more powerful mode known as based
indexed addressing.
 Example: MOV AH , [BX] . BETA [SI]
 Here the source operand is accessed using the
based indexed addressing mode. The effective
address of the source operand is obtained as
offset = [BX]+BETA+[SI]
Ajay Singh Raghuvanshi, IIITA 18
Ajay Singh Raghuvanshi, IIITA 19
Ajay Singh Raghuvanshi, IIITA 20

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3. adressingmodes1

  • 1. Execution Unit & Addressing Modes of 8086 Dr.Ajay Singh Raghuvanshi Ajay Singh Raghuvanshi, IIITA 1
  • 2. VARIOUS REGISTERS IN EU Ajay Singh Raghuvanshi, IIITA 2
  • 3. FLAG REGISTER  It is a 16-bit status register within the EU of 8086.  There are nine flags in 8086.  Six of these are status flags and three are control flags.  Status Flags are used to indicate some condition produced by an instruction  Control Flags are used to control certain operation of the processor Ajay Singh Raghuvanshi, IIITA 3
  • 4. 8086 FLAG REGISTER Ajay Singh Raghuvanshi, IIITA 4
  • 5. STATUS FLAGS  CF- Carry Flag It is set if carry out of MSB.  PF- Parity Flag It is set if result has even parity.  AF- Auxiliary Flag Used for BCD.  ZF- Zero Flag It is set if result is 0.  SF- Sign Flag It is set if result is negative.  OF- Overflow Flag It is set if signed result is out of the range. Ajay Singh Raghuvanshi, IIITA 5
  • 6. CONTROL FLAGS  TF-Single step Trap Flag It is to be set if single step mode (debugging) is needed.  IF- Interrupt Flag It is to be set, for allowing or prohibiting interruption request.  DF- Direction Flag If set, string instruction automatically decrements the address (string data transfers proceed from high address to the low address. Ajay Singh Raghuvanshi, IIITA 6
  • 7. POINTER AND INDEX REGISTERS  There are two pointer and two index registers in the EU of 8086.  These registers are used to store the offset addresses of memory locations relative to the segment registers. Ajay Singh Raghuvanshi, IIITA 7
  • 8. POINTER REGISTER Two pointer registers are :  Stack pointer – The value in the SP always represents the offset of the next stack location that can be accessed.  Base pointer – It also represents an offset relative to SS register but is employed in the based addressing mode of 8086. Ajay Singh Raghuvanshi, IIITA 8
  • 9. INDEX REGISTER Two index registers are:  Source index (SI)- It is used to store an offset address for source operand.  Destination index (DI)- It is used for storage of an offset address for the destination operand. Ajay Singh Raghuvanshi, IIITA 9
  • 10. ADDRESSING MODES OF 8086  The addressing modes available in Intel 8086 are: 1. Register Addressing 2. Immediate Addressing 3. Direct Addressing 4. Register Indirect Addressing 5. Based Relative Addressing 6. Indexed Relative Addressing 7. Based Indexed Relative Addressing Ajay Singh Raghuvanshi, IIITA 10
  • 11. The MOV instruction Ajay Singh Raghuvanshi, IIITA 11 MOV AX , BX SourceDestination
  • 12. Register Addressing Mode  With the Register Addressing mode the operand to be accessed is specified as residing in an internal register of the 8086.  Examples  Both the source and the destination operands have been specified as the contents of internal registers of the 8086 Ajay Singh Raghuvanshi, IIITA 12 Assembly Language Size Operation MOV AL, BL 8-bits Copies BL into AL MOV CH, CL 8-bits Copies CL into CH MOV AX, CX 16-bits Copies CX into AX MOV SP, BP 16-bits Copies BP into SP MOV BX, ES 16-bits Copies ES into BX MOV ECX, EBX 32-bits Copies EBX into ECX MOV ESP, EDX 32-bits Copies EDX into ESP MOV ES, DS — Not allowed (segment-to-segment) MOV BL, DX — Not allowed (mixed sizes)
  • 13. Immediate Addressing Mode  If a source operand is part of the instruction instead of the contents of a register or memory location, it represents what is called the immediate operand and is accessed using immediate addressing mode. Typically immediate operand represents constant data Immediate operands can be either a byte or word of data  Example: MOV AL , 15H (2 bytes) MOV CX, 4AC2H (3bytes). Ajay Singh Raghuvanshi, IIITA 13
  • 14. Direct Addressing Mode  Direct addressing differs from immediate addressing, that the locations following the instruction op-code hold an “Offset” which is a 16- bit offset of the storage location of the operand from the current value in the data segment (DS) register. offset is combined with the contents of DS in the BIU to produce the physical address of the operand.  Example: MOV CX , [1000]  This stands for move the contents of the memory location, which is offset by 1000H from the current value in DS into internal register CX CX [DS*10+1000]H Ajay Singh Raghuvanshi, IIITA 14
  • 15. Register Indirect Addressing Mode  Register indirect addressing is similar to direct addressing, that an effective address is combined with the contents of DS to obtain a physical address. However it differs in a way that the offset is specified. Here offset resides in either a pointer register or an index register within the 8086.The pointer register can be either a base register BX or a base pointer register BP and the index register can be source index register SI or the destination index register DI  Example MOV AX , [SI]  This instruction moves the contents of the memory location offset by the value of offset in SI from the current value in DS to the AX register. Ajay Singh Raghuvanshi, IIITA 15 AX [DS*10+[SI]]H
  • 16. Based Addressing Mode  In the based addressing mode, the physical address of the operand is obtained by adding a direct or indirect displacement of the contents of either base register BX or base pointer register BP and the current value in DS and SS respectively.  Example : MOV [BX + SI] , AL  This instruction uses base register BX and direct displacement SI to derive the EA of the destination operand. The based addressing mode is implemented by specifying the base register in the brackets followed by a period and direct displacement .The source operand is located in the byte accumulator AL Ajay Singh Raghuvanshi, IIITA 16
  • 17. Indexed Addressing Mode  Indexed addressing mode works identically to the based addressing but it uses the contents of the index registers instead of BX or BP, in the generation of the physical address.  Example MOV AL , [SI+10]  The source operand has been specified using direct index addressing. The notation this time is such, which is a direct displacement, prefixes the selected index register, SI. Ajay Singh Raghuvanshi, IIITA 17
  • 18. Based Indexed Addressing Mode  Combining the based addressing mode and the indexed addressing mode together results in a new, more powerful mode known as based indexed addressing.  Example: MOV AH , [BX] . BETA [SI]  Here the source operand is accessed using the based indexed addressing mode. The effective address of the source operand is obtained as offset = [BX]+BETA+[SI] Ajay Singh Raghuvanshi, IIITA 18