introduction of memory and i/o device with 8085

1. C.K. PITHAWALA COLLEGE OF
ENGINEERING AND
TECHNOLOGY
PREPARED BY:
TAILOR DIGEN K. 160093111016
SARANG SACHIN A. 160093111015
PATEL HARISH S. 160093111012
AKHIANIA PRATIK B. 160093111001
PATELASHISH H. 160093111009
SUBJECT: Microprocessor and interfacing
TOPIC: Interfacing of memory and I/O devices with 8085
BRANCH: Electronics and Communication
GROUP: G1A_5

2. 8085 Communication with Memory :-
• Involves the following three steps
1. Identify the memory location (with address)
2. Generate Timing & Control signals
3. Data transfer takes place

3. Example: Memory Read Operation

5. Demultiplexing Address/Data Bus:-
• 8085 identifies a memory location with its 16 address lines, (AD0 to
AD7) & (A8 to A15)
• 8085 performs data transfer using its data lines, AD0 to AD7
• Lower order address bus & Data bus are multiplexed on same lines i.e.
AD0 to AD7.
• Demultiplexing refers to separating Address & Data signals for
read/write operations

7. Need for Demultiplexing :-
8085 Memory
A8-A15
20H
AD0-AD7
05H
RD
4FH 2005H

8. 8085 Interfacing with Memory chips :-
8085
Memory
Interface
Memory
Chip
Address
Data
Control
Address
Data
Control

9. 8085 Interfacing with Memory chips :-
8085
Memory
Chip
AD0-AD7
CS
A0 – A7
Data
74LS373
A8-A15 A8-A15
ALE

10. U2
74LS373
3
4
7
8
13
14
17
18
111
2
5
6
9
12
15
16
19
D0
D1
D2
D3
D4
D5
D6
D7
OCG
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
U1
8085
36
1
2
5
6
9
8
7
10
11
29
33
39
35
12
13
14
15
16
17
18
19
21
22
23
24
25
26
27
28
30
31
32
34
3
37
4
38
RST-IN
X1
X2
SID
TRAP
RST 5.5
RST 6.5
RST 7.5
INTR
INTA
S0
S1
HOLD
READY
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A8
A9
A10
A11
A12
A13
A14
A15
ALE
WR
RD
IO/M
RST-OT
CLKO
SOD
HLDA
U3
27C512A
10
9
8
7
6
5
4
3
25
24
21
23
2
26
20
22
27
1
11
12
13
15
16
17
18
19
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
OE/VPP
A14
A15
O0
O1
O2
O3
O4
O5
O6
O7

11. Memory Mapping :-
• 8085 has 16-bit Address Bus
• The complete address space is thus given by the range of addresses 0000H –
FFFFH
• The range of addresses allocated to a memory device is known as its memory map

12. Memory map: 64K memory device
• Address lines required: 16 (A0 – A15)
• Memory map: 0000H - FFFFH
• So the memory map is
0 0 0 0
A15 A14 A13 A12 A11 to A0
0…. 0 0 = 0000H
1 1 1 1
A11 to A0
A15 A14 A13 A12
1…. 111 = FFFFH
to

13. Interfacing I/O devices with 8085 :-
• Peripheral-mapped I/O & Memory-mapped I/O
8085
I/O
Interface
I/O
Devices
Memory
Interface
Memory
Devices
System Bus

14. Techniques for I/O Interfacing :-
1. Memory-mapped I/O
2. Peripheral-mapped I/O

15. 1. Memory-mapped I/O :-
• 8085 uses its 16-bit address bus to identify a memory location
• Memory address space: 0000H to FFFFH
• 8085 needs to identify I/O devices also
• I/O devices can be interfaced using addresses from memory space
• 8085 treats such an I/O device as a memory location
• This is called Memory-mapped I/O

16. 2. Peripheral-mapped I/O :-
• 8085 has a separate 8-bit addressing scheme for I/O devices
• I/O address space: 00H to FFH
• This is called Peripheral-mapped I/O or I/O-mapped I/O

17. 8085 Communication with I/O devices :-
• Involves the following three steps
1.Identify the I/O device (with address)
2.Generate Timing & Control signals
3.Data transfer takes place
• 8085 communicates with a I/O device only if there is a
Program Instruction to do so

18. 1.Identify the I/O device (with address) :-
• Memory-mapped I/O (16-bit address)
• Peripheral-mapped I/O (8-bit address)

19. 2.Generate Timing & Control Signals :-
• Memory-mapped I/O
 Reading Input: IO/M = 0, RD = 0
 Write to Output: IO/M = 0, WR = 0
• Peripheral-mapped I/O
 Reading Input: IO/M = 1, RD = 0
 Write to Output: IO/M = 1, WR = 0

20. Peripheral I/O Instructions :-
• IN Instruction
 Inputs data from input device into the accumulator
 It is a 2-byte instruction
 Format: IN 8-bit port address
 Example: IN 01H

21. • OUT Instruction
 Outputs the contents of accumulator to an output device
 It is a 2-byte instruction
 Format: OUT 8-bit port address
 Example: OUT 02H

22. Memory-mapped I/O Instructions :-
• I/O devices are identified by 16-bit addresses
• 8085 communicates with an I/O device as if it were one of the memory locations
• Memory related instructions are used
• For e.g. LDA, STA
1. LDA 8000H
Loads A with data read from input device with 16-bit address
8000H
2. STA 8001H
Stores (Outputs) contents of A to output device with 16-bit address 8001H

23. GUIDED BY:
Prof. Rahul V. Mehta