The document provides an overview of the architecture and pin diagram of the 8085 microprocessor. It discusses the key components of the 8085 architecture including registers, arithmetic logic unit (ALU), timing and control unit, and instruction decoder. It describes the different types of registers in 8085 including general purpose registers, accumulator, program counter, stack pointer, and status register. It also explains the address bus, data bus, and control bus. Finally, it details the 40-pin dual in-line package of 8085 and describes the functions of different pins including power supply pins, interrupt pins, and serial I/O pins.

1. ARCHITECTURE AND PIN
DIAGRAM OF 8085
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2. Block Diagram of Computer
CPU
I/P
Device
O/P
Device
Memory
ALU
CU
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CU: Linked with
I/O device,
memory, ALU.
Controls all
the operations.
Memory: Store
Data.
CPU: Heart of
the Computer.
ALU: Arithmatic
and Logical
operations are
performed here.

3. Introduction of
Microprocessor
MICROPROCESSO
R
Memory
Unit
CPU
Registe
r
CU ALU
I/P
Unit
O/P
Unit
MICROCONTROLLER
•µp works using
Von-Neumann
Architecture.
•CU +ALU +
Register
•In µp ALU and
CU are used to
process the
instruction
execution.
•Data is stored in
temporary storage
device (Register).
CPU- on-a- chip
Computer- on-a- chip 3SSP/EC-502/2018

4. History of Microprocessor
 1971: 1st commertially used µp (Intel
4004).
 4 bit µp; transistors:2300; speed: 740KHz
 1976: Intel 8085
 8 bit µp; transistors:6200; speed: 3MHz
 Today: Intel Xeon.
 86 bit µp; transistors: 6 billion; speed: 3.2GHz.
 1976: 1st commercially used
microcontroller (Intel 8048).
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5. Features of 8085
 8 bit microprocessor(8085 microprocessor can read or
write or perform arithmetic and logical operations on
8-bit data at time)
 It has 8 data lines and 16 address lines hence capacity
is 28=256; memory:216= 64 kB
 Clock frequency is 3 MHz
 It requires +5V power supply.
 It is a single chip NMOS device implemented with
6200 transistors.
 It provides 74 instructions with five addressing
modes.
 It provides 5 hardware interrupt and 8 software 5SSP/EC-502/2018

6. 8085 ARCHITECTURE
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7. Architecture 0f 8085 Cont…
1. General Purpose Registers
2. Special Purpose Register
3. Program Counter
4. Stack Pointer
5. Arithmetic &Logic Unit
6. Timing and Control Unit
7. Instruction Register and Decoder
8. System Bus
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Registers

8. REGISTERS
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9. REGISTERS
Collection of set of FFs with PIPO operation.
8 bit or 16 bit.
Used to store instruction data.
General Purpose Register(B,C,D,E,H,L):
◦8 bit register.
◦Have not been exclusively used to store a particular type of
information.
◦Can be used to store data as well as address.
◦Also known as scratch pad register.
◦These registers can also used for 16-bit operations in pairs.
The default pairs are BC, DE & HL.
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B (8) C (8)
D (8) E (8)
H (8) L (8)

10. REGISTERS Contd…
Special Purpose Register :
Accumulator(A):
◦8 bit register.
◦One of the operand will always present
in the A.
◦Perform arithmetic and logical
operations.
◦Result of an operation also stored here.
◦µp communicates with I/O devices only
through A.
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11. REGISTERS Contd…
Status Register(Flag register): This is a special
8-bit register. It reflects the status of recent
arithmetic and logical operations.
Flag Set (1) Reset (0)
Sign (S) Result = -Ve Result = +Ve
Zero (Z) Result = 0 Result =1
Auxiliary
Carry (AC)
Carry/borrow
generates from bit
D3
No carry/borrow is
generated from bit
D3
Parity (P) Even no of 1’s Odd no of 1’s
Carry (C) If carry/borrow is 1 If carry/borrow is
11SSP/EC-502/2018

12. REGISTERS Contd…
Program Counter (PC):
◦ This is a register that is used to control the
sequencing of the execution of instructions.
◦ This register always holds the address of the
next instruction.
◦ Since it holds an address, it must be 16 bits
wide.
Stack pointer (SP):
◦ The stack pointer is also a 16-bit register that is
used to point into memory.
◦ The memory this register points to is a special
area called the stack.
◦ The stack is an area of memory used to hold
data that will be retreived soon.
◦ The stack is usually accessed in a Last In First
Out (LIFO) fashion. 12SSP/EC-502/2018

13. Architecture Contd…..
 Non Accessible Register:
Programmer cannot accessed them but they are
present inside the microprocessor & perform some
useful functions.
 Memory Address Register(MAR):
 Use to hold the address before it comes out on the
address bus for accessing memory or I/O devices.
 Memory Data Register(MDR):
 It is a buffer register to store the data which are
accessed through the system bus and read from the
memory or I/O devices.
 Instruction Register(IR):
 It is used to hold the instruction temporarily before it
is being decoded and executed by the microprocessor.
 Temporary register(TR):
 Used to hold some intermediate result which is
applied to the ALU or other function. (W & Z)
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14. Architecture Contd…..
 Arithmetic & Logic Unit (ALU)
◦ ALU of 8085 performs 8-bit arithmetic & logical
operations. It is known as accumulator oriented
ALU. The result is saved in accumulator register.
 Timing & Control Unit
◦ This unit works as the heart of the
microprocessor. It sends all the timing and
control signals to perform all the internal &
external operations of the CPU.
 Instruction Decoder & Machine Cycle Encoder
Unit
◦ This unit decodes the op-code stored in the
Instruction Register (IR) and encodes it for the
timing & control unit to perform the execution of
the instruction.
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15. Bus Structure
 Bus is a group of conducting lines that carries
data, address and control signals.
 A typical microprocessor communicates with
memory and I/O devices using buses.
 The 8085 uses three separate busses to perform its
operations.
◦ The address bus (16 bit)
◦ The data bus (8 bit)
◦ The control bus.
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16. Bus Structure Contd..
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17. Bus Structure Contd..
 Address Bus:
◦ 16 bits wide (A0-A15)
 Therefore, the 8085 can access locations with
numbers from 0 to 65,536. Or, the 8085 can access a
total of 64K addresses.
◦ Unidirectional
 Information flows out of the microprocessor and into
the memory or peripherals.
◦ When the 8085 wants to access a peripheral or a
memory location, it places the 16-bit address on the
address bus and then sends the appropriate control
signals.
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18. Bus Structure Contd..
 Data Bus
◦ 8 bits wide (D0 -D7)
 Therefore it can carry 8 bit data at a time.
◦ Bi-directional
 Information flows both ways between the
microprocessor and memory or I/O.
◦ The 8085 uses the data bus to transfer the binary
information.
◦ Since the data bus has 8-bits only, then the 8085
can manipulate data 8 bits at-a-time only.
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19. Bus Structure Contd..
 Control Bus
◦ The control bus consists of a number of single
lines that coordinate and control µp operations.
◦ There is no real control bus. Instead, the control
bus is made up of a number of single bit control
signals.
◦ Control signals are partly unidirectional and
partly bidirectional.
 Eg: A read/write control signal will indicate
whether memory is being written into or read
from.
 They are individual lines that provide a pulse to
indicate the operation of µp.
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20. 8085 pin Diagram
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•Dual in-line package
(DIP)
•40 pins classified into
6 groups:
1. Data bus
2. Address bus
3. Control & status
lines
4. Externally generated
signals
5. Serial interface
signals
6. Power supply &

21. 8085 pin Diagram Contd..
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•Multiplexed
address/data bus.
•Control and
status signal:
ALE.
RD.
WR.
IO/M.
S1 and S0.

22. 8085 pin Diagram Contd..
 Address and Data Buses:
A8-A15:
Unidirectional three state higher order
address bus.
AD0-AD7:
Bidirectional three state multiplexed
address/data bus. Lower order memory or I/O
address appears during the 1st clk cycle and data
during the 2nd and 3rd clk cycle of machine
state.
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23. Demultiplexing of Address & Data
Bus
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24. 8085 pin Diagram Contd..
 Control and Status Signals
ALE: Address Latch Enable. It is used to separate
the address and data from AD7-AD0 lines.
ALE =1»Address bus
=0»Data bus.
IO/M: Unidirectional signal.Used to select either
I/O devices or memory operation.
IO/M = 1»I/O Operation
= 0»Memory Operation
RD: Unidirectional active low signal. RD=0 read
operation occurs.
WR: Unidirectional active low signal. WR=0 write
operation occurs.
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25. Generation of Control Signals
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IO/M RD WR Operati
on
0 0 1 MEMR
0 1 0 MEM
W
1 0 1 IOR
1 1 0 IOW

26. 8085 pin Diagram Contd..
 Control and Status Signals
Status Signals(S1,S0):
Used to specify the kind of operation
being performed.
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S1 S0 Operation
0 0 Halt
0 1 Write
1 0 Read
1 1 Fetch
IO/
M
S1 S0 Operation
x 0 0 Halt
0 0 1 Memory Write
0 1 0 Memory Read
0 1 1 Op-code Fetch
1 0 1 I/O Write
1 1 0 I/O Read
1 1 1 Interrupt Acknowledge

27. 8085 pin Diagram Contd..
 Externally generated signals
◦ RESET IN:
 Active low signal.
 Used to reset the microprocessor.
 The program counter inside the microprocessor is set to zero.
 Reset IR and HLDA.
 Data, address and control bus are tri stated.
 Determine the address at which program execution begins.
◦ RESET OUT:
 Active high o/p signal.
 It indicates CPU is being reset.
 Used to reset all the connected devices when the microprocessor is reset.
◦ Ready:
 Used to synchronize slower peripherals with the microprocessor
 Ready =1 » Read or Write cycle (peripheral or memory is ready to send
or receive data.)
= 0 » Wait State
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28. 8085 pin Diagram Contd..
 Hold:
◦ Active high input signal.
◦ Used by the external devices to request the microprocessor for using the
buses.
◦ Address and Data bus are tri stated.
◦ Direct Memory Address (DMA)
 HLDA:
◦ Hold acknowledge.
◦ Active high o/p signal.
◦ It indicates that the CPU has received the HOLD.
◦ HLDA=1 address and data buses, RD,WR,IO/M are tri-stated
=0 after hold request removed
 INTR (Interrupt Request):
◦ General purpose maskable interrupt.
◦ Active high input signal.
◦ Lowest priority.
◦ INTR=1 PC will not be allowed to increment
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29. 8085 pin Diagram Contd..
 INTA:
◦ Interrupt acknowledge.
◦ Active low o/p signal.
◦ Used to read the op-code from data bus and execute it.
 RST 7.5,6.5,5.5:
◦ Hardware, maskable interrupt.
◦ I/P signals.
◦ Used to make the processor execute a subroutine at a
predefined address.
◦ Do not have any acknowledgement signal.
 Trap:
◦ Non maskable interrupt.
◦ It is the highest priority interrupt.
◦ Used for power failure and emergency shut off.
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30. 8085 pin Diagram Contd..
 Serial I/O Signals:
◦ Data bits are sent over a single line, one bit at a time,
in serial communication.
◦ SID:
 Serial Input Data
 Active-High Serial Input Data Line used for Serial Data
Communication.
 It is a 1-Bit Input Port inside the 8085 Microprocessor that is used to
read 1-Bit Data to and fro from the Peripheral-Devices.
 Data on this line is loaded into accumulator bit 7 whenever a RIM
instruction is executed.
◦ SOD:
 Serial Output Data
 Active-High Serial Output Data Line used for Serial Data
Communication.
 It is a 1-Bit Output Port inside the 8085 Microprocessor that is used to
write 1-Bit Data to and fro from the Peripheral-Devices.
 Output SOD is set or reset as specified by the SIM instruction.SSP/EC-502/2018 30

31. 8085 pin Diagram Contd..
 Power Supply and System Clock:
◦ X1, X2:
 Crystal input pin.
 Microprocessor can generate clk signals internally.
 A crystal (RC, LC N/W) is connected at these two pins and is
used to set frequency of the internal clock generator.
 This frequency is internally divided by 2.
◦ CLK:
 Output signal.
 Used as the system clock for peripheral and devices interfaced
with the microprocessor.
◦ VCC:
 Input Power-Supply pin which supplies the External DC Voltage
of +5v (i.e 17mA) for operation
◦ VSS:
 Main Output Power-Ground pin
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32. Tri-State Device
 Three states
◦ Logic 1
◦ Logic 0
◦ High Impedance
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I/P Enable O/P
0 1 0
1 1 1
X 0 High
Impedanc
I/P Enable O/P
0 0 0
1 0 1
X 1 High
Impedanc
e
Active High Control
Active Low Control
.

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