SlideShare a Scribd company logo
REPRESENTED BY
ANKUSH PATEL AND ANOOP KUMAR
SUBMITTED TO
MR.PRASHANT SINGH BHADORIA

 4 general purpose rgisters(data registers)
 4 segment registers
 2 pointer registers
 2 index registers
 1 instruction pointer register
 1 flag register
In the programming
model there are

1) AX register(accumulator)
2) BX Register(base register)
3) CX Register(counter register)
4) DX Register(data register)
General purpose
registers:

• Code segment register(CS): it is a 16 bit register
containing the starting address of 64 kb segment.
• Stack segment register(SS): it is a16 bit register containing
address of 64 kb segment with program stack.
• Data segment register(DS):it is a 16 bit register containing
address of 64 kb segment with program data.
• Extra segment register (ES): it is a 16 bit register
containing address of 64 kb segment ,usually with
program data.
Segment registers

 SP register(stack pointer)
 BP register(base pointer)
 SI register(source index)
 DI Register(destination index)
Pointer registers

 The instruction pointer(IP) points to the address of
the next instruction to be executed.
Instruction pointer
register

 Status flag determines the current state of the
accumulator .They are modified automatically by
CPU after mathematical operations .This allows to
determine the type of the result .
Flag register

THANK YOU

More Related Content

What's hot

Modes of 80386
Modes of 80386Modes of 80386
Modes of 80386
aviban
 
8086 assembly language
8086 assembly language8086 assembly language
8086 assembly language
Mir Majid
 

What's hot (20)

Microprocessor 8086
Microprocessor 8086Microprocessor 8086
Microprocessor 8086
 
Modes of 80386
Modes of 80386Modes of 80386
Modes of 80386
 
Architecture of 80286 microprocessor
Architecture of 80286 microprocessorArchitecture of 80286 microprocessor
Architecture of 80286 microprocessor
 
Architecture of 8086 microprocessor
Architecture of  8086 microprocessorArchitecture of  8086 microprocessor
Architecture of 8086 microprocessor
 
8086 memory segmentation
8086 memory segmentation8086 memory segmentation
8086 memory segmentation
 
80386 Architecture
80386 Architecture80386 Architecture
80386 Architecture
 
80386
8038680386
80386
 
Instruction sets of 8086
Instruction sets of 8086Instruction sets of 8086
Instruction sets of 8086
 
MPMC Microprocessor
MPMC MicroprocessorMPMC Microprocessor
MPMC Microprocessor
 
Memory segmentation-of-8086
Memory segmentation-of-8086Memory segmentation-of-8086
Memory segmentation-of-8086
 
8086
80868086
8086
 
8086 microprocessor-architecture
8086 microprocessor-architecture8086 microprocessor-architecture
8086 microprocessor-architecture
 
8086 assembly language
8086 assembly language8086 assembly language
8086 assembly language
 
Registers
RegistersRegisters
Registers
 
80286 microprocessor
80286 microprocessor80286 microprocessor
80286 microprocessor
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 
Memory Segmentation of 8086
Memory Segmentation of 8086Memory Segmentation of 8086
Memory Segmentation of 8086
 
8086 architecture and pin description
8086 architecture and pin description 8086 architecture and pin description
8086 architecture and pin description
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
 

Similar to Programmers model of 8086

computer organization and assembly Regitster.ppt
computer organization and assembly Regitster.pptcomputer organization and assembly Regitster.ppt
computer organization and assembly Regitster.ppt
ssuser7b3003
 
8086 architecture basics
8086 architecture basics8086 architecture basics
8086 architecture basics
Pundlik Rathod
 
Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor  Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor
Mustapha Fatty
 
8086 handout for chapter one and two
8086 handout for chapter one and two8086 handout for chapter one and two
8086 handout for chapter one and two
haymanotyehuala
 

Similar to Programmers model of 8086 (20)

110 ec0644
110 ec0644110 ec0644
110 ec0644
 
8086 Architecture by Er. Swapnil Kaware
8086 Architecture by Er. Swapnil Kaware8086 Architecture by Er. Swapnil Kaware
8086 Architecture by Er. Swapnil Kaware
 
8086 architecture By Er. Swapnil Kaware
8086 architecture By Er. Swapnil Kaware8086 architecture By Er. Swapnil Kaware
8086 architecture By Er. Swapnil Kaware
 
8086 class notes-Y.N.M
8086 class notes-Y.N.M8086 class notes-Y.N.M
8086 class notes-Y.N.M
 
8086 Microprocessor
8086 Microprocessor 8086 Microprocessor
8086 Microprocessor
 
computer organization and assembly Regitster.ppt
computer organization and assembly Regitster.pptcomputer organization and assembly Regitster.ppt
computer organization and assembly Regitster.ppt
 
Module 1-ppt System programming
Module 1-ppt System programmingModule 1-ppt System programming
Module 1-ppt System programming
 
Chapter 2
Chapter 2Chapter 2
Chapter 2
 
The Intel 8086 microprocessor
The Intel 8086 microprocessorThe Intel 8086 microprocessor
The Intel 8086 microprocessor
 
intel 8086 introduction
intel 8086 introductionintel 8086 introduction
intel 8086 introduction
 
MPMC Unit-1
MPMC Unit-1MPMC Unit-1
MPMC Unit-1
 
SAURABH MITRA-8086 MICROPROCESSOR
SAURABH MITRA-8086 MICROPROCESSORSAURABH MITRA-8086 MICROPROCESSOR
SAURABH MITRA-8086 MICROPROCESSOR
 
Intel 8086
Intel 8086 Intel 8086
Intel 8086
 
Intel 8086 microprocessor
Intel 8086 microprocessorIntel 8086 microprocessor
Intel 8086 microprocessor
 
Introduction of 8086 micro processor .
Introduction of 8086 micro processor .Introduction of 8086 micro processor .
Introduction of 8086 micro processor .
 
8086 architecture basics
8086 architecture basics8086 architecture basics
8086 architecture basics
 
register
registerregister
register
 
Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor  Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor
 
8051 microcontroller
 8051 microcontroller 8051 microcontroller
8051 microcontroller
 
8086 handout for chapter one and two
8086 handout for chapter one and two8086 handout for chapter one and two
8086 handout for chapter one and two
 

Recently uploaded

Recently uploaded (20)

Abortion ^Clinic ^%[+971588192166''] Abortion Pill Al Ain (?@?) Abortion Pill...
Abortion ^Clinic ^%[+971588192166''] Abortion Pill Al Ain (?@?) Abortion Pill...Abortion ^Clinic ^%[+971588192166''] Abortion Pill Al Ain (?@?) Abortion Pill...
Abortion ^Clinic ^%[+971588192166''] Abortion Pill Al Ain (?@?) Abortion Pill...
 
SOCRadar Research Team: Latest Activities of IntelBroker
SOCRadar Research Team: Latest Activities of IntelBrokerSOCRadar Research Team: Latest Activities of IntelBroker
SOCRadar Research Team: Latest Activities of IntelBroker
 
Vitthal Shirke Microservices Resume Montevideo
Vitthal Shirke Microservices Resume MontevideoVitthal Shirke Microservices Resume Montevideo
Vitthal Shirke Microservices Resume Montevideo
 
Facemoji Keyboard released its 2023 State of Emoji report, outlining the most...
Facemoji Keyboard released its 2023 State of Emoji report, outlining the most...Facemoji Keyboard released its 2023 State of Emoji report, outlining the most...
Facemoji Keyboard released its 2023 State of Emoji report, outlining the most...
 
GlobusWorld 2024 Opening Keynote session
GlobusWorld 2024 Opening Keynote sessionGlobusWorld 2024 Opening Keynote session
GlobusWorld 2024 Opening Keynote session
 
2024 RoOUG Security model for the cloud.pptx
2024 RoOUG Security model for the cloud.pptx2024 RoOUG Security model for the cloud.pptx
2024 RoOUG Security model for the cloud.pptx
 
First Steps with Globus Compute Multi-User Endpoints
First Steps with Globus Compute Multi-User EndpointsFirst Steps with Globus Compute Multi-User Endpoints
First Steps with Globus Compute Multi-User Endpoints
 
How Does XfilesPro Ensure Security While Sharing Documents in Salesforce?
How Does XfilesPro Ensure Security While Sharing Documents in Salesforce?How Does XfilesPro Ensure Security While Sharing Documents in Salesforce?
How Does XfilesPro Ensure Security While Sharing Documents in Salesforce?
 
Large Language Models and the End of Programming
Large Language Models and the End of ProgrammingLarge Language Models and the End of Programming
Large Language Models and the End of Programming
 
BoxLang: Review our Visionary Licenses of 2024
BoxLang: Review our Visionary Licenses of 2024BoxLang: Review our Visionary Licenses of 2024
BoxLang: Review our Visionary Licenses of 2024
 
Breaking the Code : A Guide to WhatsApp Business API.pdf
Breaking the Code : A Guide to WhatsApp Business API.pdfBreaking the Code : A Guide to WhatsApp Business API.pdf
Breaking the Code : A Guide to WhatsApp Business API.pdf
 
Climate Science Flows: Enabling Petabyte-Scale Climate Analysis with the Eart...
Climate Science Flows: Enabling Petabyte-Scale Climate Analysis with the Eart...Climate Science Flows: Enabling Petabyte-Scale Climate Analysis with the Eart...
Climate Science Flows: Enabling Petabyte-Scale Climate Analysis with the Eart...
 
Field Employee Tracking System| MiTrack App| Best Employee Tracking Solution|...
Field Employee Tracking System| MiTrack App| Best Employee Tracking Solution|...Field Employee Tracking System| MiTrack App| Best Employee Tracking Solution|...
Field Employee Tracking System| MiTrack App| Best Employee Tracking Solution|...
 
A Comprehensive Look at Generative AI in Retail App Testing.pdf
A Comprehensive Look at Generative AI in Retail App Testing.pdfA Comprehensive Look at Generative AI in Retail App Testing.pdf
A Comprehensive Look at Generative AI in Retail App Testing.pdf
 
Advanced Flow Concepts Every Developer Should Know
Advanced Flow Concepts Every Developer Should KnowAdvanced Flow Concepts Every Developer Should Know
Advanced Flow Concepts Every Developer Should Know
 
Innovating Inference - Remote Triggering of Large Language Models on HPC Clus...
Innovating Inference - Remote Triggering of Large Language Models on HPC Clus...Innovating Inference - Remote Triggering of Large Language Models on HPC Clus...
Innovating Inference - Remote Triggering of Large Language Models on HPC Clus...
 
How Recreation Management Software Can Streamline Your Operations.pptx
How Recreation Management Software Can Streamline Your Operations.pptxHow Recreation Management Software Can Streamline Your Operations.pptx
How Recreation Management Software Can Streamline Your Operations.pptx
 
Into the Box 2024 - Keynote Day 2 Slides.pdf
Into the Box 2024 - Keynote Day 2 Slides.pdfInto the Box 2024 - Keynote Day 2 Slides.pdf
Into the Box 2024 - Keynote Day 2 Slides.pdf
 
Beyond Event Sourcing - Embracing CRUD for Wix Platform - Java.IL
Beyond Event Sourcing - Embracing CRUD for Wix Platform - Java.ILBeyond Event Sourcing - Embracing CRUD for Wix Platform - Java.IL
Beyond Event Sourcing - Embracing CRUD for Wix Platform - Java.IL
 
Cyaniclab : Software Development Agency Portfolio.pdf
Cyaniclab : Software Development Agency Portfolio.pdfCyaniclab : Software Development Agency Portfolio.pdf
Cyaniclab : Software Development Agency Portfolio.pdf
 

Programmers model of 8086

  • 1. REPRESENTED BY ANKUSH PATEL AND ANOOP KUMAR SUBMITTED TO MR.PRASHANT SINGH BHADORIA
  • 2.   4 general purpose rgisters(data registers)  4 segment registers  2 pointer registers  2 index registers  1 instruction pointer register  1 flag register In the programming model there are
  • 3.  1) AX register(accumulator) 2) BX Register(base register) 3) CX Register(counter register) 4) DX Register(data register) General purpose registers:
  • 4.  • Code segment register(CS): it is a 16 bit register containing the starting address of 64 kb segment. • Stack segment register(SS): it is a16 bit register containing address of 64 kb segment with program stack. • Data segment register(DS):it is a 16 bit register containing address of 64 kb segment with program data. • Extra segment register (ES): it is a 16 bit register containing address of 64 kb segment ,usually with program data. Segment registers
  • 5.   SP register(stack pointer)  BP register(base pointer)  SI register(source index)  DI Register(destination index) Pointer registers
  • 6.   The instruction pointer(IP) points to the address of the next instruction to be executed. Instruction pointer register
  • 7.   Status flag determines the current state of the accumulator .They are modified automatically by CPU after mathematical operations .This allows to determine the type of the result . Flag register