D flip Flops You can watch my lectures at: Digital electronics playlist in my youtube channel: https://www.youtube.com/channel/UC_fItK7wBO6zdWHVPIYV8dQ?view_as=subscriber My Website : https://easyninspire.blogspot.com/

1. D Flip-Flop

2. Today's Topic
Sequential Logic Circuits
• D Flip-Flop

3. D Flip-Flop
• D flip – flops are also called as “Delay flip – flop” or “Data flip – flop”.
• They are used to store 1 – bit binary data.
• They are one of the widely used flip – flops in digital electronics.
• D flip – flops are also considered as Delay line elements and
Zero – Order Hold elements.

4. D Flip-Flop
• D flip – flop has two inputs , and two outputs
– a clock (CLK) input and
– a data (D) input
• And outputs are
– one is main output represented by Q and
– the other is complement of Q represented by Q’.
• The symbol of a D flip – flop is shown below.

5. Construction & Logic Circuit
• A D flip – flop is constructed by modifying an SR flip – flop.
• The major drawback of SR flip – flop is the race around condition
which in D flip – flop is eliminated
• The S input is given with D input and the R input is given with
inverted D input.

6. Clk D Q Q’
↑ » 1 0 0 1
↓ » 0 0 NC NC
↑ » 1 1 1 0
↓ » 0 1 NC NC
D Flip-Flop Truth Table

7. D Flip-Flop Truth Table
CLK D Q Q’ State
+ve 0 0 1 RESET
+ve 1 1 0 SET
-ve X Q Q’ No Change
Positive going edge / rising edge
Negative going edge / Falling edge

8. D Q(t) Q(t+1) State
0 0 0 RESET
0 1 0 RESET
1 0 1 SET
1 1 1 SET
Characteristic Table of D Flip-Flop

9. Edge triggered D Flip Flop Outputs

10. Applications
• Data storage registers.
• Data transferring as shift registers.
• Frequency division circuits.
• Delay elements

11. In Next Class
• JK Flip Flop

12. • A