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DECODERS
Today's Topic
Combinational Logic Circuits
• Decoders
Decoder
• In general an Decoder is a device or crkt. that converts data from one
format to another. Performs Exact opp. Operation of Encoder.
• In Digital circuits Decoder is a combinational circuit that is used to
convert binary form to other.
• It has maximum of ‘n’ input lines and ‘2n’ output lines
• Eg: if n=2 then Decoder is having 2 i/p lines and22 =4 o/p lines
Similarly if n=3 then Decoder is having 3 i/p lines and23 =8 o/p lines
if n=4 then Decoder is having 4 i/p lines and 24 =16 o/p lines lines
2 to 4 Decoder
• We know that if n=2 then decoder is having 2 i/p lines and22 =4 o/p
lines that means it is a 2 to 4 Decoder
• Consider 2 to 4 Decoder
• The block diagram is
• E is Enable
Truth Table is
D3
D2
D1
D0
D0D1D3 D2
Boolean Exp:
D3=E.A1.A0
D2=E.A1.A0′
D1=E.A1′.A0
D0=E.A1′.A0′
LOGIC CIRCUIT
D3
D2
D1
D0
One of these four outputs will
be ‘1’ for each combination of
inputs when enable, E is ‘1’.
3 to 8 Decoder
• 3 to 8 Decoder is having 3 i/p lines and23 =8 o/p lines
A
B
C
Truth table of 3 to 8 line decoder
D7 D5 D4 D3 D2 D1 D0D6
D1 = A’ B’ C D2 = A’ B C’
D3 = A’ B C D4 = A B’ C’
D5 = A B’ C D6 = A B C’
D7 = A B C D0= A’ B’ C’
Implementation
Logic Circuit
Implementing with 2 to 4 Decoders
• let us implement 3 to 8 decoder using 2 to 4 decoders.
• We know that 2 to 4 Decoder has two inputs, A1 & A0 and four outputs, D3 to D0.
Whereas, 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, D7 to D0.
 Number of lower order decoders required for implementing higher order decoder
using the following formula.
 Required number of lower order decoders =m2/m1
 m1 is the number of outputs of lower order decoder.
 m2 is the number of outputs of higher order decoder.
• Here, m1 = 4 and m2 = 8. Substitute, these two values in the above formula.
• Required number of 2 to 4 decoders =8/4=2
D7
D6
D5
D4
D3
D2
D1
D0
A1A2 A0
D1 = A2’ A1’ A0 D2 = A2’ A1 A0’
D3 = A2’ A1 A0 D4 = A2 A1’ A0’
D5 = A2 A1’ A0 D6 = A2 A1 A0’
D7 = A2 A1 A0 D0= A2’ A1’ A0’
D0
D1
D2
D3
D4
D5
D6
D7
Logic circuit diagram
4 to 16 Decoder
• If n=4 then Decoder is having 4 i/p lines and 24 =16 o/p lines lines
• Here I’m designing 4 to 16 decoder using 3 to 8 decoder circuits.
• We know that 3 to 8 Decoder has three inputs A2, A1 & A0 and eight
outputs, D7 to D0. Whereas, 4 to 16 Decoder has four inputs A3, A2,
A1 & A0 and sixteen outputs, D15 to D0
• Here, m1 = 8 and m2 = 16. Substitute, these two values in the
formula.
• Required number of 2 to 4 decoders =m2/m1= 16/8=2
D7
D6
D5
D4
D3
D2
D1
D0
D15
D14
D13
D12
D11
D10
D9
D8
Block Digram
A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
Write Boolean Expressions from D0 to D15
Logic Circuit
Try to Draw this on
your own
In Next Class
• Multiplexers
• De Multiplexers
• A

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Decoders in digital electronics

  • 2. Today's Topic Combinational Logic Circuits • Decoders
  • 3. Decoder • In general an Decoder is a device or crkt. that converts data from one format to another. Performs Exact opp. Operation of Encoder. • In Digital circuits Decoder is a combinational circuit that is used to convert binary form to other. • It has maximum of ‘n’ input lines and ‘2n’ output lines • Eg: if n=2 then Decoder is having 2 i/p lines and22 =4 o/p lines Similarly if n=3 then Decoder is having 3 i/p lines and23 =8 o/p lines if n=4 then Decoder is having 4 i/p lines and 24 =16 o/p lines lines
  • 4. 2 to 4 Decoder • We know that if n=2 then decoder is having 2 i/p lines and22 =4 o/p lines that means it is a 2 to 4 Decoder • Consider 2 to 4 Decoder • The block diagram is • E is Enable Truth Table is D3 D2 D1 D0 D0D1D3 D2
  • 5. Boolean Exp: D3=E.A1.A0 D2=E.A1.A0′ D1=E.A1′.A0 D0=E.A1′.A0′ LOGIC CIRCUIT D3 D2 D1 D0 One of these four outputs will be ‘1’ for each combination of inputs when enable, E is ‘1’.
  • 6. 3 to 8 Decoder • 3 to 8 Decoder is having 3 i/p lines and23 =8 o/p lines A B C
  • 7. Truth table of 3 to 8 line decoder D7 D5 D4 D3 D2 D1 D0D6 D1 = A’ B’ C D2 = A’ B C’ D3 = A’ B C D4 = A B’ C’ D5 = A B’ C D6 = A B C’ D7 = A B C D0= A’ B’ C’ Implementation
  • 9. Implementing with 2 to 4 Decoders • let us implement 3 to 8 decoder using 2 to 4 decoders. • We know that 2 to 4 Decoder has two inputs, A1 & A0 and four outputs, D3 to D0. Whereas, 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, D7 to D0.  Number of lower order decoders required for implementing higher order decoder using the following formula.  Required number of lower order decoders =m2/m1  m1 is the number of outputs of lower order decoder.  m2 is the number of outputs of higher order decoder. • Here, m1 = 4 and m2 = 8. Substitute, these two values in the above formula. • Required number of 2 to 4 decoders =8/4=2
  • 11. A1A2 A0 D1 = A2’ A1’ A0 D2 = A2’ A1 A0’ D3 = A2’ A1 A0 D4 = A2 A1’ A0’ D5 = A2 A1’ A0 D6 = A2 A1 A0’ D7 = A2 A1 A0 D0= A2’ A1’ A0’
  • 13. 4 to 16 Decoder • If n=4 then Decoder is having 4 i/p lines and 24 =16 o/p lines lines • Here I’m designing 4 to 16 decoder using 3 to 8 decoder circuits. • We know that 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, D7 to D0. Whereas, 4 to 16 Decoder has four inputs A3, A2, A1 & A0 and sixteen outputs, D15 to D0 • Here, m1 = 8 and m2 = 16. Substitute, these two values in the formula. • Required number of 2 to 4 decoders =m2/m1= 16/8=2
  • 15. A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 Write Boolean Expressions from D0 to D15
  • 16. Logic Circuit Try to Draw this on your own
  • 17. In Next Class • Multiplexers • De Multiplexers
  • 18. • A