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CS304PC:Computer Organization
and Architecture (R18 II(I sem))
Department of computer science and engineering
(AI/ML)
Session 11
by
Asst.Prof.M.Gokilavani
VITS
1/12/2023 Department of CSE (AI/ML) 1
TEXTBOOK:
• 1. Computer System Architecture – M. Moris Mano, Third Edition,
Pearson/PHI.
REFERENCES:
• Computer Organization – Car Hamacher, Zvonks Vranesic, Safea
Zaky, Vth Edition, McGraw Hill.
• Computer Organization and Architecture – William Stallings Sixth
Edition, Pearson/PHI.
• Structured Computer Organization – Andrew S. Tanenbaum, 4th
Edition, PHI/Pearson.
1/12/2023 Department of CSE (AI/ML) 2
Unit II
Microprogrammed Control: Control memory, Address sequencing,
micro program example, Design of Control unit .
Central Processing Unit : General Register Organization, Stack
organization, Instruction formats, Addressing modes, Data Transfer and
Manipulation, Program Control.
1/12/2023 Department of CSE (AI/ML) 3
Topics covered in session 11
1/12/2023 Department of CSE (AI/ML) 4
• General Register Organization
• Instruction formats
• Addressing modes
• Data Transfer and Manipulation
• Program Control.
Central Processing Unit
The operation or task that must perform by CPU is:
• Fetch Instruction: The CPU reads an instruction from memory.
• Interpret Instruction: The instruction is decoded to determine what action
is required.
• Fetch Data: The execution of an instruction may require reading data from
memory or I/O module.
• Process data: The execution of an instruction may require performing some
arithmetic or logical operation on data.
• Write data: The result of an execution may require writing data to memory
or an I/O module.
• This includes the instruction formats, addressing modes, the instruction set,
and the general organization of the CPU registers.
1/12/2023 Department of CSE (AI/ML) 5
• The major components of the CPU are an arithmetic and logic unit (ALU) and
a control unit (CU).
• There are three basic components of CPU: register bank, ALU and Control
Unit. There are several data movements between these units and for that an
internal CPU bus is used. Internal CPU bus is needed to transfer data between
the various registers and the ALU.
1/12/2023 Department of CSE (AI/ML) 6
General register Organization
1/12/2023 Department of CSE (AI/ML) 7
• The CPU is connected to the rest of the system through system bus.
Through system bus, data or information gets transferred between the
CPU and the other component of the system. The system bus may
have three components:
• Data Bus: Data bus is used to transfer the data between main memory
and CPU.
• Address Bus: Address bus is used to access a particular memory
location by putting the address of the memory location.
• Control Bus: Control bus is used to provide the different control
signal generated by CPU to different part of the system.
1/12/2023 Department of CSE (AI/ML) 8
• For example, to perform the following operation
1/12/2023 Department of CSE (AI/ML) 9
Stack Organization
• A useful feature that is included in the CPU of most computers is a
stack or last-in, first-out (LIFO) list.
• A stack is a storage device that stores information in such a manner
that the item stored last is the first item retrieved.
• The stack in digital computers is essentially a memory unit with an
address register that can count only (after an initial value is loaded into
it).
• The register that holds the address for the stack is called a stack
pointer (SP) because its value always points at the top item in the
stack.
1/12/2023 Department of CSE (AI/ML) 10
Stack Organization
• The two operations of a stack are the insertion and deletion of items.
• The operation of insertion is called push (or push-down) because it can
be thought of as the result of pushing a new item on top.
• The operation of deletion is called pop (or pop-up) because it can be
thought of as the result of removing one item so that the stack pops up.
• These operations are simulated by incrementing or decrementing
the stack pointer register.
• Types of stacks are:
• Register Stack
• Memory stack
1/12/2023 Department of CSE (AI/ML) 11
Register Stack
1/12/2023 Department of CSE (AI/ML) 12
Register Stack
• A stack can be placed in a portion of a large memory, or it can be
organized as a collection of a finite number of memory words or
registers.
• The stack pointer register SP contains a binary number whose value is
equal to the address of the word that is currently on top of the stack.
• Three items are placed in the stack: A, B, and C, in that order.
• Item C is on top of the stack so that the content of SP is now 3.
• To remove the top item, the stack is popped by reading the memory
word at address 3 and decrementing the content of SP. Item B is now
on top of the stack since SP holds address 2.
• To insert a new item, the stack is pushed by incrementing SP and
writing a word in the next-higher location in the stack .
1/12/2023 Department of CSE (AI/ML) 13
• Two operations in stack:
• PUSH Operation
• POP Operation
• The push operation is implemented with the following
sequence of microoperations:
1/12/2023 Department of CSE (AI/ML) 14
• The pop operation consists of the following sequence of
microoperations:
1/12/2023 Department of CSE (AI/ML) 15
Memory Stack
• A stack can exist as a stand-alone unit as in Figure or can be
implemented in a random-access memory attached to a CPU.
• The implementation of a stack in the CPU is done by assigning a
portion of memory to a stack operation and using a processor register
as a stack pointer.
• Figure 8-4 shows a portion of computer memory partitioned into three
segments: program, data, and stack.
• The program counter PC points at the address of the next instruction in
the program. The address register AR points at an array of data.
• The stack pointer SP points a t the top of the stack.
• The three registers are connected t o a common address bus, and either
one can provide an address for memory.
1/12/2023 Department of CSE (AI/ML) 16
1/12/2023 Department of CSE (AI/ML) 17
• Memory Stack operations are :
• Insert operation
• Delete operation
We assume that the items in the stack communicate with a data register
DR. A new item is inserted with the push operation as follows:
1/12/2023 Department of CSE (AI/ML) 18
The stack pointer is decremented so that it points at the address of the
next word. A memory write operation inserts the word from DR into the
top of the stack. A new item is deleted with a pop operation as follows:
Stack Organization Advantages
• A stack pointer is loaded with an initial value. This initial value must
be the bottom address of an assigned stack in memory.
• Henceforth, SP is automatically decremented or incremented with
every push or pop operation.
• The advantage of a memory stack is that the CPU can refer to it
without having to specify an address, since the address is always
available and automatically updated in the stack pointer.
1/12/2023 Department of CSE (AI/ML) 19
Topics to be covered in next session 12
• Instruction format
1/12/2023 Department of CSE (AI/ML) 20
Thank you!!!

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CS304PC:Computer Organization and Architecture Session 11 general register organization.pptx

  • 1. CS304PC:Computer Organization and Architecture (R18 II(I sem)) Department of computer science and engineering (AI/ML) Session 11 by Asst.Prof.M.Gokilavani VITS 1/12/2023 Department of CSE (AI/ML) 1
  • 2. TEXTBOOK: • 1. Computer System Architecture – M. Moris Mano, Third Edition, Pearson/PHI. REFERENCES: • Computer Organization – Car Hamacher, Zvonks Vranesic, Safea Zaky, Vth Edition, McGraw Hill. • Computer Organization and Architecture – William Stallings Sixth Edition, Pearson/PHI. • Structured Computer Organization – Andrew S. Tanenbaum, 4th Edition, PHI/Pearson. 1/12/2023 Department of CSE (AI/ML) 2
  • 3. Unit II Microprogrammed Control: Control memory, Address sequencing, micro program example, Design of Control unit . Central Processing Unit : General Register Organization, Stack organization, Instruction formats, Addressing modes, Data Transfer and Manipulation, Program Control. 1/12/2023 Department of CSE (AI/ML) 3
  • 4. Topics covered in session 11 1/12/2023 Department of CSE (AI/ML) 4 • General Register Organization • Instruction formats • Addressing modes • Data Transfer and Manipulation • Program Control.
  • 5. Central Processing Unit The operation or task that must perform by CPU is: • Fetch Instruction: The CPU reads an instruction from memory. • Interpret Instruction: The instruction is decoded to determine what action is required. • Fetch Data: The execution of an instruction may require reading data from memory or I/O module. • Process data: The execution of an instruction may require performing some arithmetic or logical operation on data. • Write data: The result of an execution may require writing data to memory or an I/O module. • This includes the instruction formats, addressing modes, the instruction set, and the general organization of the CPU registers. 1/12/2023 Department of CSE (AI/ML) 5
  • 6. • The major components of the CPU are an arithmetic and logic unit (ALU) and a control unit (CU). • There are three basic components of CPU: register bank, ALU and Control Unit. There are several data movements between these units and for that an internal CPU bus is used. Internal CPU bus is needed to transfer data between the various registers and the ALU. 1/12/2023 Department of CSE (AI/ML) 6
  • 7. General register Organization 1/12/2023 Department of CSE (AI/ML) 7 • The CPU is connected to the rest of the system through system bus. Through system bus, data or information gets transferred between the CPU and the other component of the system. The system bus may have three components: • Data Bus: Data bus is used to transfer the data between main memory and CPU. • Address Bus: Address bus is used to access a particular memory location by putting the address of the memory location. • Control Bus: Control bus is used to provide the different control signal generated by CPU to different part of the system.
  • 8. 1/12/2023 Department of CSE (AI/ML) 8
  • 9. • For example, to perform the following operation 1/12/2023 Department of CSE (AI/ML) 9
  • 10. Stack Organization • A useful feature that is included in the CPU of most computers is a stack or last-in, first-out (LIFO) list. • A stack is a storage device that stores information in such a manner that the item stored last is the first item retrieved. • The stack in digital computers is essentially a memory unit with an address register that can count only (after an initial value is loaded into it). • The register that holds the address for the stack is called a stack pointer (SP) because its value always points at the top item in the stack. 1/12/2023 Department of CSE (AI/ML) 10
  • 11. Stack Organization • The two operations of a stack are the insertion and deletion of items. • The operation of insertion is called push (or push-down) because it can be thought of as the result of pushing a new item on top. • The operation of deletion is called pop (or pop-up) because it can be thought of as the result of removing one item so that the stack pops up. • These operations are simulated by incrementing or decrementing the stack pointer register. • Types of stacks are: • Register Stack • Memory stack 1/12/2023 Department of CSE (AI/ML) 11
  • 13. Register Stack • A stack can be placed in a portion of a large memory, or it can be organized as a collection of a finite number of memory words or registers. • The stack pointer register SP contains a binary number whose value is equal to the address of the word that is currently on top of the stack. • Three items are placed in the stack: A, B, and C, in that order. • Item C is on top of the stack so that the content of SP is now 3. • To remove the top item, the stack is popped by reading the memory word at address 3 and decrementing the content of SP. Item B is now on top of the stack since SP holds address 2. • To insert a new item, the stack is pushed by incrementing SP and writing a word in the next-higher location in the stack . 1/12/2023 Department of CSE (AI/ML) 13
  • 14. • Two operations in stack: • PUSH Operation • POP Operation • The push operation is implemented with the following sequence of microoperations: 1/12/2023 Department of CSE (AI/ML) 14
  • 15. • The pop operation consists of the following sequence of microoperations: 1/12/2023 Department of CSE (AI/ML) 15
  • 16. Memory Stack • A stack can exist as a stand-alone unit as in Figure or can be implemented in a random-access memory attached to a CPU. • The implementation of a stack in the CPU is done by assigning a portion of memory to a stack operation and using a processor register as a stack pointer. • Figure 8-4 shows a portion of computer memory partitioned into three segments: program, data, and stack. • The program counter PC points at the address of the next instruction in the program. The address register AR points at an array of data. • The stack pointer SP points a t the top of the stack. • The three registers are connected t o a common address bus, and either one can provide an address for memory. 1/12/2023 Department of CSE (AI/ML) 16
  • 17. 1/12/2023 Department of CSE (AI/ML) 17
  • 18. • Memory Stack operations are : • Insert operation • Delete operation We assume that the items in the stack communicate with a data register DR. A new item is inserted with the push operation as follows: 1/12/2023 Department of CSE (AI/ML) 18 The stack pointer is decremented so that it points at the address of the next word. A memory write operation inserts the word from DR into the top of the stack. A new item is deleted with a pop operation as follows:
  • 19. Stack Organization Advantages • A stack pointer is loaded with an initial value. This initial value must be the bottom address of an assigned stack in memory. • Henceforth, SP is automatically decremented or incremented with every push or pop operation. • The advantage of a memory stack is that the CPU can refer to it without having to specify an address, since the address is always available and automatically updated in the stack pointer. 1/12/2023 Department of CSE (AI/ML) 19
  • 20. Topics to be covered in next session 12 • Instruction format 1/12/2023 Department of CSE (AI/ML) 20 Thank you!!!