Sunday, April 21, 2019 1
Basic Computer Organization and
Design
o Instruction Codes
o Computer Registers
o Computer Instructions
o Timing and Control
o Instruction Cycle
o Memory Reference Instructions
o Input-Output and Interrupt
Sunday, April 21, 2019 2
Instruction Codes
o A program is a set of instructions that specify
the operations, operands, and the sequence by
which processing has to occur.
o A computer instruction is a binary code that
specifies a sequence of micro-operations for
the computer.
o An instruction code is a group of bits that
instruct the computer to perform a specific
operation.
Sunday, April 21, 2019 3
Instruction Codes…
o Instruction format:
o Two major components of an instruction code:
oThe operation code (opcode)
oAddress
o An opcode specifies the operation for the instruction.
o An address specifies the registers and/or locations
in memory to use for that operation
Sunday, April 21, 2019 4
Opcode Address
Fig: Instruction Format
01115 14
I
12
Addressing
mode
Instruction Codes…
o Address Mode:
o The address field of an instruction represents
oDirect address: the address in memory of the data to use
(the address of the operand)
oIndirect address: the address in memory of the address
in memory of the data to use
Sunday, April 21, 2019 5
Basic Computer Registers
Sunday, April 21, 2019 6
Fig: Basic Processor
registers
Basic Computer Registers…
Fig: Registers
Connected to
Common Bus
Sunday, April 21, 2019 7
Computer Instructions
o The basic computer has three instruction code
formats:
Sunday, April 21, 2019 8
Computer Instructions…
Sunday, April 21, 2019 9
Fig: Basic Computer
Instructions
Computer Instructions…
o Instruction Types:
o Functional Instructions
o Arithmetic, logic, and shift instructions
o ADD, CMA, INC, CIR, CIL, AND, CLA
o Transfer Instructions
oData transfers between the main memory and the
processor registers
o LDA, STA
o Control Instructions
oProgram sequencing and control
o BUN, BSA, ISZ
o Input/Output Instructions
oInput and output
oINP, OUT
Sunday, April 21, 2019 10
Timing and Control
o Control Unit:
o Control units are implemented in one of two
ways:
o Hardwired Control
oCU is made up of sequential and combinational
circuits to generate the control signals
o Microprogrammed Control
oA control memory on the processor contains
microprograms that activate the necessary control
signals
Sunday, April 21, 2019 11
Timing and Control…
Sunday, April 21, 2019 12
Fig: Control unit of Basic Computer
Timing and Control…
o Timing Signal:
o Example: T0, T1, T2, T3, T4, T0, T1, . . .
Assume: At time T4, SC is cleared to 0 if decoder
output D3 is active.
Sunday, April 21, 2019 13
Clock
T0 T1 T2 T3 T4 T0
T0
T1
T2
T3
T4
D3
CLR
SC
D3T4: SC  0
Instruction Cycle
o In the basic computer each instruction cycle
consists:
i. Fetch an instruction from memory
ii. Decode the instruction
iii. Read the effective address from memory if the
instruction has an indirect address.
iv. Execute the instruction.
Sunday, April 21, 2019 14
Instruction Cycle…
o Fetch and Decode
Sunday, April 21, 2019 15
T0: AR PC (S0S1S2=010, T0=1)
T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1)
T2: D0, . . . , D7  Decode IR(12-14), AR  IR(0-11), I  IR(15)
Instruction Cycle…
o Determine the Type of Instruction
Sunday, April 21, 2019 16
D'7IT3: AR M[AR]
D'7I'T3: Nothing
D7I'T3: Execute a register-reference instr.
D7IT3: Execute an input-output instr.
Instruction Cycle…
o Register Reference Instructions
Sunday, April 21, 2019 17
Instruction Micro-operation Description
D7l'T3: SC 0 Clear SC
CLA D7l'T3IR(11):AC0 Clear AC
CLE D7l'T3IR(10):E0 Clear E
CMA D7l'T3IR(9):AC (AC)’ Complement AC
CME D7l'T3IR(8): E (E)’ Complement E
CIR D7l'T3IR(7): ACshr AC, AC(I5)E, EAC(0) Circulate right
CIL D7l'T3IR(6): ACshl AC, AC(0) E, EAC(I5) Circulate left
INC D7l'T3IR(5):ACAC+1 Increment AC
SPA D7l'T3IR(4): If (AC(I5) = 0) then (PCPC +1) Skip if positive
SNA D7l'T3IR(3): If (AC(I5) = 1) then (PCPC +1) Skip if negative
SZA D7l'T3IR(2): If (AC = 0) then (PCPC +1) Skip if AC zero
SZE D7l'T3IR(1): If (E = 0) then (PCPC +1) Skip if E zero
HLT D7l'T3IR(0): S 0 (Sis a start-stop flip-flop) Halt computer
Instruction Cycle…
o Memory Reference Instruction
Sunday, April 21, 2019 18
Symbol
Operation
Decoder Symbolic Description
AND D0 AC  AC  M[AR]
ADD D1 AC  AC + M[AR], E  Cout
LDA D2 AC  M[AR]
STA D3 M[AR]  AC
BUN D4 PC  AR
BSA D5 M[AR]  PC, PC  AR + 1
ISZ D6 M[AR]  M[AR] + 1, if M[AR] + 1 = 0 then PC  PC+1
AND to AC
D0T4: DR  M[AR] Read operand
D0T5: AC  AC  DR, SC  0 AND with AC
ADD to AC
D1T4: DR  M[AR] Read operand
D1T5: AC  AC + DR, E  Cout, SC  0 Add to AC and store carry in E
Instruction Cycle…
o Memory Reference Instruction…
Sunday, April 21, 2019 19
LDA: Load to AC
D2T4: DR  M[AR]
D2T5: AC  DR, SC  0
STA: Store AC
D3T4: M[AR]  AC, SC  0
BUN: Branch Unconditionally
D4T4: PC  AR, SC  0
BSA: Branch and Save Return Address
M[AR]  PC, PC  AR + 1
D5T4: M[AR]  PC, AR  AR + 1
D5T5: PC  AR, SC  0
ISZ: Increment and Skip-if-Zero
D6T4: DR  M[AR]
D6T5: DR  DR + 1
D6T4: M[AR]  DR, if (DR = 0) then (PC  PC + 1), SC  0
Instruction Cycle…
o Flowchart For Memory Reference Instructions
Sunday, April 21, 2019 20
Input-output and Interrupt
o Input and output instructions are needed for
transferring information to and from AC
register.
o for checking the flag bits, and
o for controlling the interrupt facility.
o Note: Input-output instructions have an
operation code 1111 and are recognized by the
control when D7 = 1 and I = 1.
Sunday, April 21, 2019 21
Input-Output and Interrupts…
o Input-Output Instructions…
Sunday, April 21, 2019 22
D7IT3 = p
IR(i) = Bi, i = 6, …, 11
p: SC  0 Clear SC
INP pB11: AC(0-7)  INPR, FGI  0 Input char. to AC
OUT pB10: OUTR  AC(0-7), FGO  0 Output char. from AC
SKI pB9: if(FGI = 1) then (PC  PC + 1) Skip on input flag
SKO pB8: if(FGO = 1) then (PC  PC + 1) Skip on output flag
ION pB7: IEN  1 Interrupt enable on
IOF pB6: IEN  0 Interrupt enable off
INPR Input register - 8 bits
OUTR Output register - 8 bits
FGI Input flag - 1 bit
FGO Output flag - 1 bit
IEN Interrupt enable - 1 bit
Input-Output and Interrupts…
o External events can force the computer to quit
the normal program flow to react fast on the
events. Such event that requires fast response by
the computer is called interrupt.
o interrupt routine: The collection of
instructions that have to be executed to respond
to the interrupt
Sunday, April 21, 2019 23
o IEN (Interrupt-enable flip-flop)
o can be set and cleared by instructions
o when cleared, the computer cannot be interrupted
Input-Output and Interrupts…
o Flowchart for Interrupt Cycle
Sunday, April 21, 2019 24
Programming the Basic Computer
o Introduction
o Machine Language
o Assembly Language
o Programming Arithmetic and Logic Operations
Sunday, April 21, 2019 25
Introduction
o Instruction Set of the Basic Computer
Sunday, April 21, 2019 26
m: effective address
M: memory word
(operand) found at m
Introduction…
o Types of programming language:
o Machine language: 1’s and 0’s (Binary code),
Octal, and Hexadecimal code
o Assembly language: symbolic Code
o High-level language
Sunday, April 21, 2019 27
Machine Language
o Comparison of Programming Languages
Sunday, April 21, 2019 28
Sunday, April 21, 2019 29

Basic Computer Organization and Design

  • 1.
  • 2.
    Basic Computer Organizationand Design o Instruction Codes o Computer Registers o Computer Instructions o Timing and Control o Instruction Cycle o Memory Reference Instructions o Input-Output and Interrupt Sunday, April 21, 2019 2
  • 3.
    Instruction Codes o Aprogram is a set of instructions that specify the operations, operands, and the sequence by which processing has to occur. o A computer instruction is a binary code that specifies a sequence of micro-operations for the computer. o An instruction code is a group of bits that instruct the computer to perform a specific operation. Sunday, April 21, 2019 3
  • 4.
    Instruction Codes… o Instructionformat: o Two major components of an instruction code: oThe operation code (opcode) oAddress o An opcode specifies the operation for the instruction. o An address specifies the registers and/or locations in memory to use for that operation Sunday, April 21, 2019 4 Opcode Address Fig: Instruction Format 01115 14 I 12 Addressing mode
  • 5.
    Instruction Codes… o AddressMode: o The address field of an instruction represents oDirect address: the address in memory of the data to use (the address of the operand) oIndirect address: the address in memory of the address in memory of the data to use Sunday, April 21, 2019 5
  • 6.
    Basic Computer Registers Sunday,April 21, 2019 6 Fig: Basic Processor registers
  • 7.
    Basic Computer Registers… Fig:Registers Connected to Common Bus Sunday, April 21, 2019 7
  • 8.
    Computer Instructions o Thebasic computer has three instruction code formats: Sunday, April 21, 2019 8
  • 9.
    Computer Instructions… Sunday, April21, 2019 9 Fig: Basic Computer Instructions
  • 10.
    Computer Instructions… o InstructionTypes: o Functional Instructions o Arithmetic, logic, and shift instructions o ADD, CMA, INC, CIR, CIL, AND, CLA o Transfer Instructions oData transfers between the main memory and the processor registers o LDA, STA o Control Instructions oProgram sequencing and control o BUN, BSA, ISZ o Input/Output Instructions oInput and output oINP, OUT Sunday, April 21, 2019 10
  • 11.
    Timing and Control oControl Unit: o Control units are implemented in one of two ways: o Hardwired Control oCU is made up of sequential and combinational circuits to generate the control signals o Microprogrammed Control oA control memory on the processor contains microprograms that activate the necessary control signals Sunday, April 21, 2019 11
  • 12.
    Timing and Control… Sunday,April 21, 2019 12 Fig: Control unit of Basic Computer
  • 13.
    Timing and Control… oTiming Signal: o Example: T0, T1, T2, T3, T4, T0, T1, . . . Assume: At time T4, SC is cleared to 0 if decoder output D3 is active. Sunday, April 21, 2019 13 Clock T0 T1 T2 T3 T4 T0 T0 T1 T2 T3 T4 D3 CLR SC D3T4: SC  0
  • 14.
    Instruction Cycle o Inthe basic computer each instruction cycle consists: i. Fetch an instruction from memory ii. Decode the instruction iii. Read the effective address from memory if the instruction has an indirect address. iv. Execute the instruction. Sunday, April 21, 2019 14
  • 15.
    Instruction Cycle… o Fetchand Decode Sunday, April 21, 2019 15 T0: AR PC (S0S1S2=010, T0=1) T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1) T2: D0, . . . , D7  Decode IR(12-14), AR  IR(0-11), I  IR(15)
  • 16.
    Instruction Cycle… o Determinethe Type of Instruction Sunday, April 21, 2019 16 D'7IT3: AR M[AR] D'7I'T3: Nothing D7I'T3: Execute a register-reference instr. D7IT3: Execute an input-output instr.
  • 17.
    Instruction Cycle… o RegisterReference Instructions Sunday, April 21, 2019 17 Instruction Micro-operation Description D7l'T3: SC 0 Clear SC CLA D7l'T3IR(11):AC0 Clear AC CLE D7l'T3IR(10):E0 Clear E CMA D7l'T3IR(9):AC (AC)’ Complement AC CME D7l'T3IR(8): E (E)’ Complement E CIR D7l'T3IR(7): ACshr AC, AC(I5)E, EAC(0) Circulate right CIL D7l'T3IR(6): ACshl AC, AC(0) E, EAC(I5) Circulate left INC D7l'T3IR(5):ACAC+1 Increment AC SPA D7l'T3IR(4): If (AC(I5) = 0) then (PCPC +1) Skip if positive SNA D7l'T3IR(3): If (AC(I5) = 1) then (PCPC +1) Skip if negative SZA D7l'T3IR(2): If (AC = 0) then (PCPC +1) Skip if AC zero SZE D7l'T3IR(1): If (E = 0) then (PCPC +1) Skip if E zero HLT D7l'T3IR(0): S 0 (Sis a start-stop flip-flop) Halt computer
  • 18.
    Instruction Cycle… o MemoryReference Instruction Sunday, April 21, 2019 18 Symbol Operation Decoder Symbolic Description AND D0 AC  AC  M[AR] ADD D1 AC  AC + M[AR], E  Cout LDA D2 AC  M[AR] STA D3 M[AR]  AC BUN D4 PC  AR BSA D5 M[AR]  PC, PC  AR + 1 ISZ D6 M[AR]  M[AR] + 1, if M[AR] + 1 = 0 then PC  PC+1 AND to AC D0T4: DR  M[AR] Read operand D0T5: AC  AC  DR, SC  0 AND with AC ADD to AC D1T4: DR  M[AR] Read operand D1T5: AC  AC + DR, E  Cout, SC  0 Add to AC and store carry in E
  • 19.
    Instruction Cycle… o MemoryReference Instruction… Sunday, April 21, 2019 19 LDA: Load to AC D2T4: DR  M[AR] D2T5: AC  DR, SC  0 STA: Store AC D3T4: M[AR]  AC, SC  0 BUN: Branch Unconditionally D4T4: PC  AR, SC  0 BSA: Branch and Save Return Address M[AR]  PC, PC  AR + 1 D5T4: M[AR]  PC, AR  AR + 1 D5T5: PC  AR, SC  0 ISZ: Increment and Skip-if-Zero D6T4: DR  M[AR] D6T5: DR  DR + 1 D6T4: M[AR]  DR, if (DR = 0) then (PC  PC + 1), SC  0
  • 20.
    Instruction Cycle… o FlowchartFor Memory Reference Instructions Sunday, April 21, 2019 20
  • 21.
    Input-output and Interrupt oInput and output instructions are needed for transferring information to and from AC register. o for checking the flag bits, and o for controlling the interrupt facility. o Note: Input-output instructions have an operation code 1111 and are recognized by the control when D7 = 1 and I = 1. Sunday, April 21, 2019 21
  • 22.
    Input-Output and Interrupts… oInput-Output Instructions… Sunday, April 21, 2019 22 D7IT3 = p IR(i) = Bi, i = 6, …, 11 p: SC  0 Clear SC INP pB11: AC(0-7)  INPR, FGI  0 Input char. to AC OUT pB10: OUTR  AC(0-7), FGO  0 Output char. from AC SKI pB9: if(FGI = 1) then (PC  PC + 1) Skip on input flag SKO pB8: if(FGO = 1) then (PC  PC + 1) Skip on output flag ION pB7: IEN  1 Interrupt enable on IOF pB6: IEN  0 Interrupt enable off INPR Input register - 8 bits OUTR Output register - 8 bits FGI Input flag - 1 bit FGO Output flag - 1 bit IEN Interrupt enable - 1 bit
  • 23.
    Input-Output and Interrupts… oExternal events can force the computer to quit the normal program flow to react fast on the events. Such event that requires fast response by the computer is called interrupt. o interrupt routine: The collection of instructions that have to be executed to respond to the interrupt Sunday, April 21, 2019 23 o IEN (Interrupt-enable flip-flop) o can be set and cleared by instructions o when cleared, the computer cannot be interrupted
  • 24.
    Input-Output and Interrupts… oFlowchart for Interrupt Cycle Sunday, April 21, 2019 24
  • 25.
    Programming the BasicComputer o Introduction o Machine Language o Assembly Language o Programming Arithmetic and Logic Operations Sunday, April 21, 2019 25
  • 26.
    Introduction o Instruction Setof the Basic Computer Sunday, April 21, 2019 26 m: effective address M: memory word (operand) found at m
  • 27.
    Introduction… o Types ofprogramming language: o Machine language: 1’s and 0’s (Binary code), Octal, and Hexadecimal code o Assembly language: symbolic Code o High-level language Sunday, April 21, 2019 27
  • 28.
    Machine Language o Comparisonof Programming Languages Sunday, April 21, 2019 28
  • 29.