This document discusses ripple counters and their characteristics: - Ripple counters have a modulus (MOD) which is the number of states the counter cycles through before repeating. The MOD is equal to 2n where n is the number of flip-flops. - State transition diagrams graphically represent the sequence of states a counter goes through with each clock pulse. - Common integrated circuits used for ripple counters include the 74LS90, 74LS92, 74LS93 and 74HC390. The 74LS93 and 74HC390 can be configured to count to different MODs by controlling enable inputs. - The internal logic of the 74LS93 is shown, with the clock pulse applied to

1. Ripple Counter

2. Modulus (MOD) of a counter
• Is the number of different states the counter must go
through to complete its counting cycle.
• Is also the counter’s frequency division ratio
• Maximum MOD number = 2n , n = number of flip flops.
MOD States
4 00, 01, 10, 11
8 000, 001, 010, 011, 100, 101, 110, 111
MOD-8
Counter16 kHz 2 kHz
Number of Flip Flops Maximum Possible
MOD
2 22 = 4
3 23 = 8
4 24 = 16

3. State Transition Diagram
• Graphical representation of the sequence of states
MOD-4 Counter MOD-6 Counter
MOD-8 Counter
• Each circle represents one possible state, as indicated by the binary number inside the circle
• For example, the circle 001 state (i.e Q2 = 0 , Q1 = 0, Q0 = 1 )
• Each arrow represents the occurrence of a clock pulse and show how one state changes to
another
Q0
Q1
Q2 (LSB)
(MSB)
MOD-16 Counter

4. 4-Bit Ripple UP Counter
CLK
J
K
A
A
CLK
J
K
B
B
CLK
J
K
C
C
CLK
J
K
D
D
* All J and K
inputs assumed
to be 1.
B
A
Clock
DCBA
(count)
1 2 3 4 5 6 7 8 9 10 11
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011 1101 1111 0001
1100 1110 0000
12 1513 14 16 17 18
C
D
Recycle to 0000
(LSB)
(MSB)
LSB – Least Significant Bit MSB – Most Significant Bit

5. 3-Bit Ripple DOWN Counter
CLK
J
K
A
A
CLK
J
K
B
B
CLK
J
K
C
C
* All J and K
inputs assumed
to be 1.
1 2 3 4 5 6 7 8 9Clock
pulses
Count
(CBA)
B
000 001010011100101110111 000 111
Recycles
A (LSB)
C (MSB)
A
B
Observe that for the Down
counter, the clock is
connected to the output.

6. Truncated Counters with MOD Number <2N
• Example:
A MOD-6 Counter
achieved by clearing the
MOD-8 counter when
B and C = ‘1’
CLK
J
K
A
A
CLK
J
K
B
B
CLK
J
K
C
C
* All J and K
inputs are 1.
CLR CLR CLR
B
C
C
B
A
Clock
pulses
NAND
output
1 2 3 4 5 6 7 8 9 10 11 12
C B A
000
100
010110
111 001
011101
* *
000 001 010 011 100 101 000 001 010 011 100 101
(CBA)
Spike/glitch due to B
and C having to go
HIGH first before the
flip flops are reset.

7. Integrated Circuit Ripple Counters
• 74LS90 – Single Decade Ripple counter
• 74LS92 – Single Divide by Twelve Ripple counter
• 74LS93 – Single 4 bit Ripple Counter
• 74HC390 – Dual Decade Ripple Counters

8. Internal Logic Diagram for 74LS93
CLK
J
K
Q
Q
CLK
J
K
Q
Q
CLK
J
K
Q
Q
CLK
J
K
Q
Q
CP0
CP1
MR1
MR2
Q3Q2Q1Q0
CLR CLR CLR CLR
• Note that for 4 Bit Ripple Counter – the output Q0 must be externally
connected to input CP1 and the clock pulse are applied at CP0.
• All outputs will be reset to LOW when MR1 and MR2 is high

9. 74LS93 Wired as a MOD-16 counter
74LS93
MR1 and MR2
are both tied to
LOW Output Frequency of Q3=
𝐶𝑙𝑜𝑐𝑘 𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦
𝑀𝑂𝐷

10. 74HC390

11. 74HC390 as a MOD 10 Counter
10019
10008
01117
01106
01015
01004
00113
00102
00011
00000
Q3Q2Q1Q0Decimal
Counting Sequence

12. 74HC390 as a MOD 6 Counter
01015
01004
00113
00102
00011
00000
Q3Q2Q1Q0Decimal
Counting Sequence

14. Preparations for Mini Project