The document describes the process of fabricating integrated circuit (IC) chips. There are several key steps: lithography is used to transfer circuit patterns onto silicon wafers through photomasks, and oxidation, deposition, ion implantation, and etching are carried out to build up the transistor layers. Projection lithography is the dominant exposure method and involves projecting a reduced image of the photomask onto the wafer through a lens system to achieve high resolution needed for modern chips. Positive photoresist is commonly used and becomes soluble when exposed to light, allowing developed areas to be etched. The fabrication process layers and patterns all the necessary circuit elements and interconnects on a single substrate to produce an operational IC.

1. FABRICATION
PROCESS

2.  The entire circuitry ie. The active (transistor, FET, diode,
capaciotor, resistor) & passive elements are housed on the
same substrate.
 The steps to fabricate IC chips is similar to the steps required
to fabricate transistors, diodes etc.
 In IC chips, the fabrication of circuit elements and their
interconnections are done at same time.
 It has so many advantages such as extremely small size,
small weight, low cost, low power consumption, high
processing speed, easy replacement, etc.
 IC is the principal component in all electronic devices.

3.  Lithography
 Oxidation
 Ion-Implantation
 Diffusion
 Deposition
 Etching

4.  The process used to transfer patterns
to each layer of the IC.
 The process of transferring geometric
shapes from a mask to the surface of
a Silicon wafer using Light.

5.  The system used to create the aerial
image at the photoresist surface.
 There are three basic methods of wafer
exposure:
› Contact Printing
› Proximity Printing
› Projection Printing

6. •Oldest and simplest method.
•Mask is places in direct contact
with the resist layer on the wafer.
•Exposure of resist takes place by
shining light through the mask.
•Mask and wafer are in contact
which minimizes diffraction effect.
•System is capable of high
resolution printing.
•Hard contact between the mask
and the wafer damage both the
mask and the resist layer.
•An expensive method.

7. •Mask and wafer are
separated by 5-25µm.
•Solves the defect of
contact printing but it
degrades the resolution of
the printed patterns due to
diffraction effects.
•Not suitable for
manufacturing of today's
chip.
•Not possible to print
features smaller than a few
µm with UV exposure and
gap of 20µm.

8. •Dominant method of wafer exposure.
•This system provide high resolution.
•Mask is physically separated from the wafer .
•An optical system is used to image the mask
on the wafer.
•The optical system reduces the mask image
by 4x to 5x ie. Only a small portion of the
wafer is printed during each exposure.
•Lens system is used to create a sharp image
on the layer.
•As these images are created by lens, they
are not equal as pattern.
•Pattern on the mask is larger than the actual
pattern on the semiconductor, it is easy to
create image properly.

9.  Surface Cleaning
 Dehydration Baking
 Spin Coating with photoresist
 Soft Baking
 Mask Alignment
 Exposure
 Development
 Hard Baking
 Post process cleaning
Photoresist
Coating
Development

10.  Surface Cleaning:
› Wafer soaked in TCE, IPA, Acetone and DI
water respectively.
› N2 blow off is used to dry the wafer.
 Dehydration Baking:
› Wafer baked for 60 sec on hot plate at 100o
– 120oC.

11.  Spin Coating:
› Resist is coated to uniform thickness by spin
coating.
› Spinning rate is 3000-6000 rpm for 15-30 secs.
› Spin rate varies according to photoresist.
Spin
5000
rpm
20 sec.
Sprinkle
Photoresist
to Vacuum Pump

12.  Soft Bake (Pre Bake):
› Bake the resist-coated sample
 90-100C for 1-2 min.
› The coating solvent evaporates.
› It densify the resist after spin coating.

13.  Mask Alignment and Exposure:
•Mask with proper
geometric pattern
aligned over the
substrate by mask
aligner.
•Exposed to the
radiation.
•Radiation sensitive
photoresists property
changed.

14.  Development:
› Positive Resist:
 Exposed region removed
› Negative Resist:
 Unexposed region removed

15.  Hard Baking (Post Bake):
› Used to stabilize and harden developed
photoresist.
› 120-140o C for 10-20 min.
› Removes any residuals of coating solvent
and developer.
 Post processing & cleaning:
› Final thin film pattern is obtained either by
etching or lift off process.
› Photoresist id removed by using acetone or
TCE ( for +ve photoresist) or by methyle
ethyle ketone (for –ve photoresist).

16. Positive Photoresist:
•Becomes soluble when exposed to
light.
•Exposed part dissolve in developer.
•Image the same that on the mask.
•Higher resolution.
•Commonly used in advanced IC
fabrication.
•Expensive
Negative Photoresist:
•Becomes insoluble when exposed to
light.
•Unexposed part will be dissolved in
development solution.
•Poor resolution.
•Cheap.
It is a photo sensitive material, sensitive to UV but visible in light.

17. 1. Substrate:2. Film Deposition:3. Photoresist Application:
< 100º C
10-30 mins
4. Pre Bake:5. Mask Alignment:6. Exposure:7. Development and Ashing:8. Metalization:9. Removal of Photoresist:

19. Fab-Tech 2011 20
Image Reversal
1. Use a NEGATIVE Mask2. Expose3. Exposed region has positive side-walls4. Post-exposure Bake: Cross links exposed resist5. Flood Exposure6. Develop