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Implementation of DSP Algorithms on FPGA

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Silicon Mentor
Silicon Mentor

This document discusses the implementation of digital signal processing (DSP) algorithms on field programmable gate arrays (FPGAs). It describes DSP and FPGAs, two common design approaches (custom and automated model-based), and the typical design flow. The design flow involves system modeling, simulation with floating-point data, data type conversion to fixed-point, hardware implementation, and simulation. The most challenging part is converting the design from floating-point to fixed-point arithmetic to reduce hardware usage while maintaining accuracy.

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Implementation of DSP Algorithms on FPGA -Krishan Siliconmentor
Contents • Introduction ▫ DSP ▫ FPGA • Design approaches • Design Flow
Introduction • Here we have discussed a basic flow of implementation of multi Gigabit/s DSP systems on Field programmable gate array (FPGA)
Cont… DSP • Digital signal processing enables us to work on analog signals/data using high speed digital systems. • This enables digital implementations of most analog circuits i.e. filters, PLL, modulators etc.
Cont… FPGA • FPGAs are programmable logic devices with tremendous amount of logic on it. • One can implement any logic function on FPGA by using description of that logic in verilog or VHDL. • Along with programmable logic some variants include DSP specific hardware on chip. Which includes DSP slices, High speed transceivers, ADCs and DACs.
Design Approaches To start with design of Digital Signal Processing system one can follow following approaches: • Custom design ▫ In this the description of design is written directly in HDL. For example, to design a FIR filter the delays will be implemented in verilog using DFFs and the coefficients of the filters will be stored in registers. • Automated Model base design ▫ In this approach we use automated tools like HDL coder, System generator etc to generate HDL code of design from behavioral model in working on floating point precision.
Cont… Among approaches discussed previously the custom approach is most efficient and requires lower resources on FPGA. Except some standard IP blocks the automated design is not that optimized and requires more programmable resources.
Design Flow Design flow used for design of a Digital Signal Processing system consists of following steps: • system modeling on simulink • simulation (with floating point data) • Data type conversion (to fixed point) • Hardware implementation and simulation
Cont… • The most challenging task in design is to convert design from floating point arithmetic to fixed point. • As it would be very expensive to implement floating point design. (due to high hardware utilization) • The process of conversion includes determining proper word length while maintaining accuracy of the design.
About Us • Company : SiliconMentor • Website: http://www.siliconmentor.com • For any query feel free to contact us.
Thank You

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Implementation of DSP Algorithms on FPGA

  • 1. Implementation of DSP Algorithms on FPGA -Krishan Siliconmentor
  • 2. Contents • Introduction ▫ DSP ▫ FPGA • Design approaches • Design Flow
  • 3. Introduction • Here we have discussed a basic flow of implementation of multi Gigabit/s DSP systems on Field programmable gate array (FPGA)
  • 4. Cont… DSP • Digital signal processing enables us to work on analog signals/data using high speed digital systems. • This enables digital implementations of most analog circuits i.e. filters, PLL, modulators etc.
  • 5. Cont… FPGA • FPGAs are programmable logic devices with tremendous amount of logic on it. • One can implement any logic function on FPGA by using description of that logic in verilog or VHDL. • Along with programmable logic some variants include DSP specific hardware on chip. Which includes DSP slices, High speed transceivers, ADCs and DACs.
  • 6. Design Approaches To start with design of Digital Signal Processing system one can follow following approaches: • Custom design ▫ In this the description of design is written directly in HDL. For example, to design a FIR filter the delays will be implemented in verilog using DFFs and the coefficients of the filters will be stored in registers. • Automated Model base design ▫ In this approach we use automated tools like HDL coder, System generator etc to generate HDL code of design from behavioral model in working on floating point precision.
  • 7. Cont… Among approaches discussed previously the custom approach is most efficient and requires lower resources on FPGA. Except some standard IP blocks the automated design is not that optimized and requires more programmable resources.
  • 8. Design Flow Design flow used for design of a Digital Signal Processing system consists of following steps: • system modeling on simulink • simulation (with floating point data) • Data type conversion (to fixed point) • Hardware implementation and simulation
  • 9. Cont… • The most challenging task in design is to convert design from floating point arithmetic to fixed point. • As it would be very expensive to implement floating point design. (due to high hardware utilization) • The process of conversion includes determining proper word length while maintaining accuracy of the design.
  • 10. About Us • Company : SiliconMentor • Website: http://www.siliconmentor.com • For any query feel free to contact us.