Computer architecture
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The document discusses different types of binary adders and arithmetic circuits. A binary adder uses full adder circuits connected in cascade to generate the sum of two binary numbers of any length. A binary adder-subtractor can perform both addition and subtraction using an exclusive-OR gate with each full adder and a mode input to control the operation. A binary incrementer independently increments a number using a combinational circuit. An arithmetic circuit uses a parallel adder as its basic component and multiplexers to choose different arithmetic operations like addition, subtraction, and increment on its inputs and output.
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General register organization (computer organization)
This document discusses the organization of a CPU and its registers. It includes tables that encode the register selection fields and ALU operations. It also provides examples of micro-operations for the CPU, showing the register selections, ALU operations, and control words. Key registers discussed include the accumulator, instruction register, address register, and program counter.
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The document discusses the instruction cycle in a computer system. The instruction cycle retrieves program instructions from memory, decodes what actions they specify, and carries out those actions. It has four main steps: 1) fetching the next instruction from memory and storing it in the instruction register, 2) decoding the encoded instruction, 3) reading the effective address for direct or indirect memory instructions, and 4) executing the instruction by passing control signals to relevant components like the ALU to perform the specified actions. The instruction cycle is the basic operational process in which a computer executes instructions.
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Basic Computer Organization and Design
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The document discusses different addressing modes used in computer instructions. It explains that the addressing mode specifies how the operands are chosen during program execution. Some key addressing modes are direct, indirect, register, register indirect, and relative addressing. The addressing mode determines the effective address, which is the actual memory location of the operand.
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An instruction tells the CPU to perform an operation by storing bits of code in memory that are read into the instruction register. Instructions are executed in three phases: fetching the instruction from memory, decoding what operation it specifies, and then executing it, which may involve reading an effective address or performing an input/output operation. Memory reference, register reference, and input/output instructions allow the CPU to access different parts of the computer's architecture during the instruction cycle.
Interrupts
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Addressing mode is the way of addressing a memory location in instruction. Microcontroller needs data or operands on which the operation is to be performed. The method of specifying source of operand and output of result in an instruction is known as addressing mode.
There are various methods of giving source and destination address in instruction, thus there are various types of Addressing Modes. Here you will find the different types of Addressing Modes that are supported in Micro Controller 8051. Types of Addressing Modes are explained below:
1.Register Addressing Mode
2.Direct Addressing Mode
3.Register Indirect Addressing Mode
4.Immediate Addressing Mode
5.Index Addressing Mode
Explanation:
Register Addressing Mode: In this addressing mode, the source of data or destination of result is Register. In this type of addressing mode the name of the register is given in the instruction where the data to be read or result is to be stored.
Example: ADD A, R5 ( The instruction will do the addition of data in Accumulator with data in register R5)
Direct Addressing Mode: In this type of Addressing Mode, the address of data to be read is directly given in the instruction. In case, for storing result the address given in instruction is used to store the result.
Example: MOV A, 46H ( This instruction will move the contents of memory location 46H to Accumulator)
Register Indirect Addressing Mode: In Register Indirect Addressing Mode, as its name suggests the data is read or stored in register indirectly. That is, we provide the register in the instruction, in which the address of the other register is stored or which points to other register where data is stored or to be stored.
Example: MOV A, @R0 ( This instruction will move the data to accumulator from the register whose address is stored in register R0 ).
Also Read: Architecture Of 8051
Immediate Addressing Mode : In Immediate Addressing Mode , the data immediately follows the instruction. This means that data to be used is already given in the instruction itself.
Example: MOV A, #25H ( This instruction will move the data 25H to Accumulator. The # sign shows that preceding term is data, not the address.)
Index Addressing Mode: Offset is added to the base index register to form the effective address if the memory location.This Addressing Mode is used for reading lookup tables in Program Memory. The Address of the exact location of the table is formed by adding the Accumulator Data to the base pointer.
Example: MOVC, @A+DPTR ( This instruction will move the data from the memory to Accumulator; the address is made by adding the contents of Accumulator and Data Pointer.
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Instruction Cycle in Computer Organization.pptx
The instruction cycle consists of three main stages:
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2. The decode stage where the instruction is interpreted by the decoder.
3. The execute stage where the control unit passes signals to perform the required operations, and the result is stored in memory or sent to an output device. The program counter may then be updated to fetch the next instruction, beginning the cycle again.
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Register transfer language is used to describe micro-operation transfers between registers. It represents the sequence of micro-operations performed on binary information stored in registers and the control that initiates the sequences. A register is a group of flip-flops that store binary information. Information can be transferred between registers using replacement operators and control functions. Common bus systems using multiplexers or three-state buffers allow efficient information transfer between multiple registers by selecting one register at a time to connect to the shared bus lines. Memory transfers are represented by specifying the memory word selected by the address in a register and the data register involved in the transfer.
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The document discusses three modes of data transfer between the central processing unit (CPU) and input/output (I/O) devices: programmed I/O, interrupt-initiated I/O, and direct memory access (DMA). Programmed I/O requires the CPU to continuously monitor the I/O device for data readiness, slowing performance. Interrupt-initiated I/O allows the I/O device to generate interrupts when ready, pausing the CPU to service transfers. DMA bypasses the CPU by allowing direct memory access between I/O devices and memory, speeding large data transfers.
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Addressing mode is the way of addressing a memory location in instruction. Microcontroller needs data or operands on which the operation is to be performed. The method of specifying source of operand and output of result in an instruction is known as addressing mode.
There are various methods of giving source and destination address in instruction, thus there are various types of Addressing Modes. Here you will find the different types of Addressing Modes that are supported in Micro Controller 8051. Types of Addressing Modes are explained below:
1.Register Addressing Mode
2.Direct Addressing Mode
3.Register Indirect Addressing Mode
4.Immediate Addressing Mode
5.Index Addressing Mode
Explanation:
Register Addressing Mode: In this addressing mode, the source of data or destination of result is Register. In this type of addressing mode the name of the register is given in the instruction where the data to be read or result is to be stored.
Example: ADD A, R5 ( The instruction will do the addition of data in Accumulator with data in register R5)
Direct Addressing Mode: In this type of Addressing Mode, the address of data to be read is directly given in the instruction. In case, for storing result the address given in instruction is used to store the result.
Example: MOV A, 46H ( This instruction will move the contents of memory location 46H to Accumulator)
Register Indirect Addressing Mode: In Register Indirect Addressing Mode, as its name suggests the data is read or stored in register indirectly. That is, we provide the register in the instruction, in which the address of the other register is stored or which points to other register where data is stored or to be stored.
Example: MOV A, @R0 ( This instruction will move the data to accumulator from the register whose address is stored in register R0 ).
Also Read: Architecture Of 8051
Immediate Addressing Mode : In Immediate Addressing Mode , the data immediately follows the instruction. This means that data to be used is already given in the instruction itself.
Example: MOV A, #25H ( This instruction will move the data 25H to Accumulator. The # sign shows that preceding term is data, not the address.)
Index Addressing Mode: Offset is added to the base index register to form the effective address if the memory location.This Addressing Mode is used for reading lookup tables in Program Memory. The Address of the exact location of the table is formed by adding the Accumulator Data to the base pointer.
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Volatile Memory
Non-Volatile Memory
Memory Hierarchy
Memory Access Methods
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Sequential Access
Direct Access
Main Memory
DRAM
SRAM
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ROM: Read Only Memory
Auxiliary Memory
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Associative Memory
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Instruction Cycle in Computer Organization.pptx
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PARALLEL ADDER
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PARALLEL ADDER/SUBTRACTOR
DLD Lecture No 20 Look Ahead Carry Generator, Binary Subtractors and BCD Add...
- A binary adder produces the sum of two binary numbers by connecting multiple full adders in cascade, with the output carry from each full adder feeding into the input carry of the next.
- In an n-bit adder, the carry propagation delay is 2n gate levels as the carry must propagate from the least to most significant bit. A carry lookahead generator reduces this delay by computing carry outputs in parallel rather than series.
- A binary subtractor implements subtraction by adding the number to the 2's complement of the subtrahend. An overflow in addition of signed numbers occurs if the carry into and out of the sign bit position differ.
18CSC203J_COA_Unit 2 final.pptx
SIGNED 2’S COMPLEMENT SYSTEM: The standard system used to represent signed binary integers. A negative number is obtained by taking the 2's complement of its positive form. This allows for an easy way to perform addition and subtraction on signed binaries.
CARRY LOOKAHEAD ADDER: A fast adder circuit that calculates carry bits in advance to reduce wait time, improving speed over a ripple carry adder. It determines carry signals through a carry generate and propagate network to independently calculate carry and sum bits.
SHIFT-AND-ADD MULTIPLICATION: Implements binary multiplication by shifting and adding the multiplicand to itself the number of times indicated by
Digital Logic Design
This document provides information about Dr. Krishnanaik Vankdoth and his background and qualifications. It then discusses digital logic design topics like digital circuits, combinational logic, sequential circuits, logic gates, truth tables, adders, decoders, encoders, multiplexers and demultiplexers. Example circuits are provided and the functions of components like full adders, parallel adders, magnitude comparators are explained through diagrams and logic equations.
Chapter 4: Combinational Logic
This document summarizes key concepts about combinational logic circuits. It defines combinational logic as circuits whose outputs depend only on the current inputs, in contrast to sequential logic which also depends on prior inputs. Common combinational circuits are described like half and full adders used for arithmetic, as well as decoders. The design process for combinational circuits is outlined involving specification, formulation, optimization and technology mapping. Implementation of functions using NAND and NOR gates is also discussed.
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
This slide tells you about Half adder, Full adder, Half subtractor, Full subtractor with its diagram, truth table.
DCF-Combinational circuit
This document provides an overview of digital computer fundamentals, including combinational logic circuits, binary adders, half adders and full adders, binary subtraction, multiplexers, decoders, encoders, and floating point number systems. Combinational logic is used to perform calculations in circuits like arithmetic logic units. Binary adders perform addition of binary numbers using full-adder circuits connected in series. Half adders and full adders are basic adder circuits classified by the number of inputs. Decoders and encoders are circuits that convert between binary codes and encoded representations. Floating point numbers represent values with a radix point that can vary, allowing a wide range of numbers to be stored.
Combinationalcircuits
This document provides an overview of combinational logic circuits such as adders, subtractors, and multiplexers. It describes half adders and full adders that perform binary addition of two and three bits respectively. Binary adders can be constructed by cascading full adders. Binary subtractors use half and full subtractors to perform subtraction by taking the 2's complement of one number and adding it to the other. An example circuit is shown that can function as either an adder or subtractor based on a mode input. Finally, multiplexers are described as circuits that select one of several input lines to output based on selection lines.
Unit 3 combinational circuits
This document discusses combinational circuits. It defines combinational circuits as circuits whose outputs only depend on the current inputs and not previous states. The document covers various types of combinational circuits like adders, subtractors, encoders, decoders, multiplexers, demultiplexers and code converters. It provides block diagrams, truth tables and logic diagrams to explain the working of these combinational circuits.
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
Arithmetic Circuits:
Introduction, Adder, BCD Adder, Excess – 3 Adder, Binary
Subtractors, BCD Subtractor, Multiplier, Comparator
CHAPTER 6: Function of Combination Logic From Flyod ( Digital Logic Design )
Presentation Outline:
6–1 Half and Full Adders
6–2 Parallel Binary Adders
6–5 Decoders
6–6 Encoders
6–8 Multiplexers (Data Selectors)
6–9 Demultiplexers
DLD Chapter-4.pdf
This document discusses combinational logic circuits. It begins with an introduction to combinational circuits and their characteristics. It then covers various types of combinational logic circuits including adders, subtractors, encoders, decoders, comparators, and multiplexers. For each circuit type, it provides explanations of how they work and examples of their logic designs and truth tables. The overall purpose is to explain the design and implementation of common combinational logic circuits.
CS304PC:Computer Organization and Architecture Session 3 micro operations.pptx
CS304PC:Computer Organization and Architecture Session 3 micro operations.pptxAsst.prof M.Gokilavani
This document provides an overview of the topics covered in Session 3 of the CS307PC course on Computer Organization and Architecture. The session covered Register Transfer Language and microoperations, including register transfer, bus and memory transfers, and different types of microoperations such as arithmetic, logic, and shift microoperations. It provides examples of arithmetic microoperations like addition and subtraction. Binary adders and incrementers are discussed as implementations of arithmetic microoperations. The next session will cover logic and shift microoperations as well as arithmetic shift logic units.Lecturer mid.ppt
The document discusses binary arithmetic and logic gates. It describes half adders, full adders, half subtractors, and full subtractors. A half adder adds two binary digits and outputs a sum and carry bit. A full adder adds three binary digits and outputs a sum and carry bit. A half subtractor subtracts one binary digit from another and outputs a difference and borrow bit. A full subtractor subtracts three binary digits and outputs a difference and borrow bit. Boolean expressions and logic circuits are provided for each.
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DLD Lecture No 20 Look Ahead Carry Generator, Binary Subtractors and BCD Add...
DLD Lecture No 20 Look Ahead Carry Generator, Binary Subtractors and BCD Add...
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
CHAPTER 6: Function of Combination Logic From Flyod ( Digital Logic Design )
CHAPTER 6: Function of Combination Logic From Flyod ( Digital Logic Design )
CS304PC:Computer Organization and Architecture Session 3 micro operations.pptx
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Unit v export incentives
The document discusses various export promotion schemes and fiscal incentives in India. It outlines schemes that provide duty exemptions or remissions on imports of inputs for export production, including Advance Authorizations, Duty Free Import Authorizations, and Duty Entitlement Passbook schemes. It also discusses duty drawback schemes that provide refunds of import duties on raw materials. Other topics covered include Export Promotion Capital Goods scheme, excise duty refunds, income tax exemptions, and marketing assistance available to exporters in India.
Types of letter of credits on 11 09 2012
This document discusses different types of letters of credit (LCs). It begins by defining an LC as a written instrument issued by a bank at a customer's request to pay an exporter for goods or services provided the exporter presents the required documents.
The document then outlines various types of LCs: revocable LCs can be amended or cancelled at any time; irrevocable LCs constitute a definite undertaking by the issuing bank to pay provided documents are presented; confirmed LCs add the confirmation of the confirming bank; LCs can be with or without recourse for the bank; acceptance credits require drafts to be accepted; transferable LCs allow transfer of payments to other parties; back-to-back L
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This document discusses various types of risks involved in import-export businesses and how to manage them. It covers political risks, foreign exchange risks, currency risks, cargo risks, commercial risks, and legal risks of operating in foreign countries. Some key strategies mentioned for managing risks include monitoring political developments, using letters of credit, shifting risks to other parties through contracts, and purchasing various types of insurance. The document also provides examples of specific risks like theft, water damage, and total or partial cargo losses, and discusses managing these risks.
Processing of export order on 4 09 12
The document discusses the process of an export order from beginning to end. It explains that an export order communicates the importer's decision to purchase items from the exporter, and represents an offer and acceptance between the two parties. The document then outlines each step of securing and processing an export order, including developing logistics, arranging for materials, production, shipment, and negotiating shipping documents.
North america ppt
North America is a continent located in the Northern Hemisphere. It is bordered by the Arctic Ocean to the north, the Atlantic Ocean to the east and west, and the Pacific Ocean and South America to the west and south. North America covers about 9.5 million square miles and is home to countries like the United States, Canada, Mexico, and Caribbean island nations. The population of North America is concentrated mainly in the United States, Mexico, and Canada, with major cities including Mexico City, New York City, Los Angeles, and Toronto.
Mib 3.6 unit ii on 10 09 12
This document discusses various methods of payment for export bills, including letters of credit. It provides instructions for opening a letter of credit, examining one, common discrepancies, negotiating with discrepancies, required documents, and presenting documents. Key points covered include what information needs to be included when opening an L/C, common issues that can cause discrepancies in documents, the process for negotiating documents and addressing discrepancies, and documentation typically required for negotiation.
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The document discusses the history and key aspects of the Uniform Customs and Practice (UCP) for documentary credits, specifically UCP 500 and the upcoming UCP 600. UCP 500 was published in 1993 by the International Chamber of Commerce and is the global standard for letters of credit. UCP 600 will take effect on June 1, 2007 and contains some changes from UCP 500, such as reducing the number of articles from 49 to 39 and shortening the time banks have to examine documents from seven to five days. The document also provides background on the development of the UCP over time and examines some of the substantive changes between the two versions.
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This document defines various categories of exporters and importers and provides explanations of key export and import documentation terms. It discusses the different types of exporters such as manufacturer exporter, merchant exporter, AEZ, BTP, EOU, and service provider. It also defines categories of importers. The document then provides details on various export documents including commercial invoices, packing lists, bills of lading, certificates of inspection and origin, and regulatory documents. It explains types of bills of lading and transport documents used in export and import transactions.
Mib 3.6 on 13 th aug 2012 charac and types of exim docs
The document discusses various types of export documentation used in international trade. It begins by explaining the objectives and advantages of an Aligned Documentation System (ADS) which standardizes forms to make them easier to complete.
It then describes the two main types of export documents - commercial documents and regulatory documents. Commercial documents include invoices, certificates, bills of lading/air waybills used to facilitate the trade transaction. Regulatory documents are required by government authorities for customs clearance and compliance.
The document provides details on key commercial documents like commercial invoices, packing lists, certificates of origin. It also explains transport documents like bills of lading and describes their various types. Regulatory documents mentioned include shipping bills and exchange control forms
Mib 3.6 on 13 th aug 2012 charac and types of exim docs copy
The document discusses the objectives and advantages of an Aligned Documentation System (ADS) for export documentation. It then explains key concepts in ADS including:
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- ADS standardizes paper size and specifications for forms.
It then provides an overview of the types of commercial documents used in export documentation, dividing them into principal documents used for key functions like invoicing and transportation, and auxiliary documents used to support the principal documents. Regulatory documents
Mib 3.6 marine insurance on 09 10 12 copy
Marine insurance protects against losses to ships, cargo, freight and other associated interests during marine adventures. There are various types of marine insurance policies that can be taken out, including hull insurance, cargo insurance, and liability insurances. Cargo insurance specifically protects physical damage or loss of goods during transit by land, sea or air. It is usually provided through Institute Cargo Clauses which determine the scope of coverage. Other types include open or voyage policies tailored for individual shipments, and contingency policies that protect the seller's interests.
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The document discusses digital computers and their basic components. It introduces the concepts of bits, binary digits that can have the values of 0 or 1. It describes the major hardware components of a computer including the CPU, memory, and input/output devices. It also explains some fundamental concepts in digital logic like Boolean algebra, logic gates, flip-flops and sequential circuits.
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The document discusses instruction codes and computer registers. Instruction codes are made up of an opcode and address that tell the computer what operation to perform. Computer registers store important data and instructions, including the program counter, address register, instruction register, temporary register, data register, accumulator, input register, and output register. These registers perform functions like holding memory operands, instructions, temporary data, addresses, and input/output characters.
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Computer architecture
- 1. COMPUTER ARCHITECTURE BY- NITU SRIVASATAVA
- 2. BINARY ADDER The digital circuit that generates the arithmetic sum of two binary numbers of any length is called a BINARY ADDER.