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Computer Architecture – 
An Introduction 
CS2052 Computer Architecture 
Computer Science & Engineering 
University of Moratuwa 
Dilum Bandara 
Dilum.Bandara@uom.lk
From Outside 
2 
Input 
Output 
Processor 
Memory 
Hard disk 
DVD ROM 
Graphics 
card 
Ethernet 
Source: techwench.com
From Outside (Cont.) 
Source: Daniel Zanetti, wikimedia.org 
3 
Source: Amazon.com 
Touch pad 
Touch screen 
Wireless 
Screen size 
Weight 
Battery capacity 
SD Card slot 
Sensors
From Inside 
Source: http://rays-place.net 
4 
Source: http://news.techgenie.com
From Inside (Cont.) 
5 
Source: www.laptopaid.com 
Source: http://techgoesboom.com
From Inside (Cont.) 
6 
iPhone 6
What We Are Going To Study? 
 How these internal components look like? 
 Top-down approach with schematics 
 How do they fit together? 
 How to program them? 
 How to improve their performance? 
7
Very High-Level View of a Computer 
 CPU – execute instructions 
 Memory – store program & data 
System Bus 
 IO devices – receive inputs & produce outputs 
 Bus – interconnects everything by transferring data 
8 
Central 
Processing 
Unit (CPU) 
Main 
Memory 
Input/output 
(IO) Devices
Blocks of a Microprocessor 
9 
Program 
Memory 
Instruction 
Register 
STACK Program Counter 
Instruction 
Decoder 
Timing, Control, & Register selection 
Accumulator 
RAM & 
Data 
Registers 
ALU 
IO 
IO 
FLAG & 
Special 
Purpose 
Registers 
Source: Makis Malliris & Sabir Ghauri, UWE
Blocks of a Microprocessor (Cont.) 
10 
Literal 
Address 
Operation 
Program 
Memory 
Instruction 
Register 
Address 
STACK Program Counter 
Instruction 
Decoder 
Timing, Control and Register selection 
Accumulator 
RAM & 
Data 
Registers 
ALU 
IO 
IO 
FLAG & 
Special 
Function 
Registers 
Clock 
Reset 
Interrupts 
Program Execution Section Register Processing Section 
Set up 
Set up 
Modify 
Internal data bus 
Source: Makis Malliris & Sabir Ghauri, UWE
Arithmetic & Logic Unit (ALU) 
 Data processing 
unit 
 Arithmetic unit 
 Performs 
arithmetic 
operations 
 Logic unit 
 Performs logical 
operations 
11 
Accumulator 
Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
Registers 
 Type of memory located inside CPU 
 Can hold a single piece of data 
 This data is useful in both data processing & control 
functionalities 
 Several types of CPU registers 
 Program Counter (PC) 
 Instruction Register (IR) 
 Accumulator or working register 
 Special purpose registers 
 Flag register 
 General purpose registers 
12
Program Counter (PC) 
 Used to keep track of memory address of next 
instruction to be executed 
 When instructions are fetched, always 
instruction pointed by PC is fetched into CPU 
 Once the instruction is fetched, PC is updated to 
point to next instruction 
 PC = PC + d 
13
Instruction Register (IR) 
 Once fetched, instructions are stored in IR for 
execution 
 Located closely to control unit which decodes 
the instruction 
14
Accumulator (A) / Working Register (W) 
 Results of arithmetic & logical operations always 
go to accumulator 
 Connected directly to output of ALU 
15 
Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
FLAG/STATUS Register 
 Individual bits Indicate status of ALU operations 
Source: www.plantation-productions.com/Webster/www.artofasm.com/Linux/HTML/RealArithmetic.html 
16
17 
Internal Structure 
B 
C 
D 
E 
ALU 
A 
Address Bus 
PC 
IR 
ALU 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus 
Source : Dr. Chathura de Silva, CSE, UoM
18 
Sample Program 
100: Load A,10 
101: Load B,15 
102: Add A,B 
103: STORE A,[20] 
Load A,10 
Load B,15 
ADD A,B 
STORE A,[20] 
100 
101 
102 
103 
104 
105 
Program memory 
18 
19 
20 
21 
00 
00 
00 
00 
Data memory
19 
Instruction Execution Sequence 
1. Fetch next instruction from memory to IR 
2. Change PC to point to next instruction 
3. Determine type of instruction just fetched 
4. If instruction needs data from memory, 
determine where it is 
5. Fetch data if needed into register 
6. Execute instruction 
7. Go to step 1 & continue with next instruction
20 
Before execution of 1st fetch cycle 
B 
C 
D 
E 
ALU 
A 
Address Bus 
100 
IR 
ALU 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus 
Source: Dr. Chathura de Silva, CSE, UoM
21 
After 1st fetch cycle … 
B 
C 
D 
E 
ALU 
A 
Address Bus 
101 
ALU 
Load A,10 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
22 
After 1st instruction cycle … 
B 
C 
D 
E 
ALU 
10 
Address Bus 
101 
ALU 
Load A,10 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
23 
Sample Program (Cont.) 
100: Load A,10 
101: Load B,15 
102: Add A,B
24 
After 2nd fetch cycle … 
B 
C 
D 
E 
ALU 
A 
Address Bus 
102 
ALU 
Load B,15 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
25 
After 2nd instruction cycle … 
15 
C 
D 
E 
ALU 
10 
Address Bus 
102 
ALU 
Load B,15 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
26 
Sample Program (Cont.) 
100: Load A,10 
101: Load B,15 
102: Add A,B
27 
After 3rd fetch cycle … 
15 
C 
D 
E 
ALU 
10 
Address Bus 
103 
ALU 
ADD A,B 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
28 
After 3rd instruction cycle … 
15 
C 
D 
E 
ALU 
25 
Address Bus 
103 
ALU 
ADD A,B 
Control Unit 
FLAG 
+1 
CTRL Bus Data Bus
Architectural Differences 
 Length of microprocessors’ data word 
 4, 8, 16, 32, 64, & 128 bit 
 Speed of instruction execution 
 Clock rate & processor speed 
 Size of direct addressable memory 
 CPU architecture 
 Instruction set 
 Number & types of registers 
 Support circuits 
 Compatibility with existing software & hardware 
development systems 29
Microprocessor vs. Microcontroller 
 Microprocessor – CPU & various IO functions are packed 
as separate ICs 
 Microcontroller – Most IO functions are integrated into 
same package with CPU 
30 
Program 
Memory 
Microprocessor 
Clock 
Data 
Storage 
I/O 
I/O 
I/O 
Program 
Memory 
Microprocessor 
Core 
Real-time 
Clock 
I/O 
I/O 
I/O 
Data 
Storage
Programming Hierarchies 
31 
Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
Programming Language Levels 
 Machine code (40s-50s) 
 0001000000111000 0001001000110100 
 0101110000000000 
 0001110000000000 0001001000110101 
 Hex notation (50s-60s) 
 1038 1234 
 5C00 
 1E00 1235 
Source: http://mentalfloss.com/article/53160/meet- 32 
refrigerator-ladies-who-programmed-eniac
Programming Language Levels (Cont.) 
 Assembler 
 Machine code (60s-70s) 
.define const = 6 
num1: .byte [1] 
num2: .byte [2] 
move.b num1,d0 
addq.b #const,d0 
move.b d0,num2 
 High-level languages 
 C code fragment (70s-80s) 
#define const 6 
int num1, num2; 
num2 = num1 + const; 33
When is Assembler Appropriate? 
 Parts of a program where absolute speed is 
critical 
 More effective use of CPU registers & instruction set 
 Can produce code that runs faster than that produced 
by a compiler 
 There may be no other way to access a particular 
feature of hardware 
 Compiler might not provide library functions to access 
IO ports or to disable/enable interrupts 
 Compiler might not take advantage of CPU special 
instructions 
 BCD arithmetic, binary-ASCII conversion, table lookups, high 
speed copying of entire blocks of data 34
Building Digital Solutions to 
Computational Problems 
35 
 Labs & design project 
 Product specs 
 Algorithms, RTL, etc. 
 Flowcharts 
 State transition diagrams 
 Logic equations 
 Circuit schematics 
 Verilog or VHDL code 
 Assembler 
 C, C++ 
 TTL Gates (AND, OR, XOR ... ) 
 Programmable Logic 
 Custom ASICs 
 FPGAs 
 MCs, DSPs
Real-World Performance Metrics 
 Commercial digital designs seek the most 
appropriate trade-offs for the target application 
 Time-to-market is also very important 
36 
Cost 
Commodity Products 
Speed 
Scientific Computing, 
Simulation 
Energy 
Portable Devices 
Capacity 
Multimedia, 
Scientific Computing, 
Simulation

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Computer Architecture – An Introduction

  • 1. Computer Architecture – An Introduction CS2052 Computer Architecture Computer Science & Engineering University of Moratuwa Dilum Bandara Dilum.Bandara@uom.lk
  • 2. From Outside 2 Input Output Processor Memory Hard disk DVD ROM Graphics card Ethernet Source: techwench.com
  • 3. From Outside (Cont.) Source: Daniel Zanetti, wikimedia.org 3 Source: Amazon.com Touch pad Touch screen Wireless Screen size Weight Battery capacity SD Card slot Sensors
  • 4. From Inside Source: http://rays-place.net 4 Source: http://news.techgenie.com
  • 5. From Inside (Cont.) 5 Source: www.laptopaid.com Source: http://techgoesboom.com
  • 6. From Inside (Cont.) 6 iPhone 6
  • 7. What We Are Going To Study?  How these internal components look like?  Top-down approach with schematics  How do they fit together?  How to program them?  How to improve their performance? 7
  • 8. Very High-Level View of a Computer  CPU – execute instructions  Memory – store program & data System Bus  IO devices – receive inputs & produce outputs  Bus – interconnects everything by transferring data 8 Central Processing Unit (CPU) Main Memory Input/output (IO) Devices
  • 9. Blocks of a Microprocessor 9 Program Memory Instruction Register STACK Program Counter Instruction Decoder Timing, Control, & Register selection Accumulator RAM & Data Registers ALU IO IO FLAG & Special Purpose Registers Source: Makis Malliris & Sabir Ghauri, UWE
  • 10. Blocks of a Microprocessor (Cont.) 10 Literal Address Operation Program Memory Instruction Register Address STACK Program Counter Instruction Decoder Timing, Control and Register selection Accumulator RAM & Data Registers ALU IO IO FLAG & Special Function Registers Clock Reset Interrupts Program Execution Section Register Processing Section Set up Set up Modify Internal data bus Source: Makis Malliris & Sabir Ghauri, UWE
  • 11. Arithmetic & Logic Unit (ALU)  Data processing unit  Arithmetic unit  Performs arithmetic operations  Logic unit  Performs logical operations 11 Accumulator Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
  • 12. Registers  Type of memory located inside CPU  Can hold a single piece of data  This data is useful in both data processing & control functionalities  Several types of CPU registers  Program Counter (PC)  Instruction Register (IR)  Accumulator or working register  Special purpose registers  Flag register  General purpose registers 12
  • 13. Program Counter (PC)  Used to keep track of memory address of next instruction to be executed  When instructions are fetched, always instruction pointed by PC is fetched into CPU  Once the instruction is fetched, PC is updated to point to next instruction  PC = PC + d 13
  • 14. Instruction Register (IR)  Once fetched, instructions are stored in IR for execution  Located closely to control unit which decodes the instruction 14
  • 15. Accumulator (A) / Working Register (W)  Results of arithmetic & logical operations always go to accumulator  Connected directly to output of ALU 15 Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
  • 16. FLAG/STATUS Register  Individual bits Indicate status of ALU operations Source: www.plantation-productions.com/Webster/www.artofasm.com/Linux/HTML/RealArithmetic.html 16
  • 17. 17 Internal Structure B C D E ALU A Address Bus PC IR ALU Control Unit FLAG +1 CTRL Bus Data Bus Source : Dr. Chathura de Silva, CSE, UoM
  • 18. 18 Sample Program 100: Load A,10 101: Load B,15 102: Add A,B 103: STORE A,[20] Load A,10 Load B,15 ADD A,B STORE A,[20] 100 101 102 103 104 105 Program memory 18 19 20 21 00 00 00 00 Data memory
  • 19. 19 Instruction Execution Sequence 1. Fetch next instruction from memory to IR 2. Change PC to point to next instruction 3. Determine type of instruction just fetched 4. If instruction needs data from memory, determine where it is 5. Fetch data if needed into register 6. Execute instruction 7. Go to step 1 & continue with next instruction
  • 20. 20 Before execution of 1st fetch cycle B C D E ALU A Address Bus 100 IR ALU Control Unit FLAG +1 CTRL Bus Data Bus Source: Dr. Chathura de Silva, CSE, UoM
  • 21. 21 After 1st fetch cycle … B C D E ALU A Address Bus 101 ALU Load A,10 Control Unit FLAG +1 CTRL Bus Data Bus
  • 22. 22 After 1st instruction cycle … B C D E ALU 10 Address Bus 101 ALU Load A,10 Control Unit FLAG +1 CTRL Bus Data Bus
  • 23. 23 Sample Program (Cont.) 100: Load A,10 101: Load B,15 102: Add A,B
  • 24. 24 After 2nd fetch cycle … B C D E ALU A Address Bus 102 ALU Load B,15 Control Unit FLAG +1 CTRL Bus Data Bus
  • 25. 25 After 2nd instruction cycle … 15 C D E ALU 10 Address Bus 102 ALU Load B,15 Control Unit FLAG +1 CTRL Bus Data Bus
  • 26. 26 Sample Program (Cont.) 100: Load A,10 101: Load B,15 102: Add A,B
  • 27. 27 After 3rd fetch cycle … 15 C D E ALU 10 Address Bus 103 ALU ADD A,B Control Unit FLAG +1 CTRL Bus Data Bus
  • 28. 28 After 3rd instruction cycle … 15 C D E ALU 25 Address Bus 103 ALU ADD A,B Control Unit FLAG +1 CTRL Bus Data Bus
  • 29. Architectural Differences  Length of microprocessors’ data word  4, 8, 16, 32, 64, & 128 bit  Speed of instruction execution  Clock rate & processor speed  Size of direct addressable memory  CPU architecture  Instruction set  Number & types of registers  Support circuits  Compatibility with existing software & hardware development systems 29
  • 30. Microprocessor vs. Microcontroller  Microprocessor – CPU & various IO functions are packed as separate ICs  Microcontroller – Most IO functions are integrated into same package with CPU 30 Program Memory Microprocessor Clock Data Storage I/O I/O I/O Program Memory Microprocessor Core Real-time Clock I/O I/O I/O Data Storage
  • 31. Programming Hierarchies 31 Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid
  • 32. Programming Language Levels  Machine code (40s-50s)  0001000000111000 0001001000110100  0101110000000000  0001110000000000 0001001000110101  Hex notation (50s-60s)  1038 1234  5C00  1E00 1235 Source: http://mentalfloss.com/article/53160/meet- 32 refrigerator-ladies-who-programmed-eniac
  • 33. Programming Language Levels (Cont.)  Assembler  Machine code (60s-70s) .define const = 6 num1: .byte [1] num2: .byte [2] move.b num1,d0 addq.b #const,d0 move.b d0,num2  High-level languages  C code fragment (70s-80s) #define const 6 int num1, num2; num2 = num1 + const; 33
  • 34. When is Assembler Appropriate?  Parts of a program where absolute speed is critical  More effective use of CPU registers & instruction set  Can produce code that runs faster than that produced by a compiler  There may be no other way to access a particular feature of hardware  Compiler might not provide library functions to access IO ports or to disable/enable interrupts  Compiler might not take advantage of CPU special instructions  BCD arithmetic, binary-ASCII conversion, table lookups, high speed copying of entire blocks of data 34
  • 35. Building Digital Solutions to Computational Problems 35  Labs & design project  Product specs  Algorithms, RTL, etc.  Flowcharts  State transition diagrams  Logic equations  Circuit schematics  Verilog or VHDL code  Assembler  C, C++  TTL Gates (AND, OR, XOR ... )  Programmable Logic  Custom ASICs  FPGAs  MCs, DSPs
  • 36. Real-World Performance Metrics  Commercial digital designs seek the most appropriate trade-offs for the target application  Time-to-market is also very important 36 Cost Commodity Products Speed Scientific Computing, Simulation Energy Portable Devices Capacity Multimedia, Scientific Computing, Simulation