The document discusses Schottky barriers and contact resistance at metal-semiconductor junctions. Some key points: 1) A Schottky barrier forms at a metal-semiconductor junction and depends on the barrier height. The barrier height is influenced by the work functions but often does not follow predictions due to interface states. 2) Contact resistance is measured using the transmission line method, where resistance is measured across test structures with varying metal contact lengths. Specific contact resistance is calculated from these measurements. 3) Contact resistance is important to optimize in semiconductor devices and production. It is influenced by temperature and current effects at the metal-semiconductor interface.

1. Schottky Barrier and
Contact Resistance
PREPARED BY:
Manan Bhatt(17MSE003)
Dhaval Naik(17MSE008)
Brij Modi(17MSE018)

2. Metal Semiconductor Junction :
 In solid-state physics, a metal–semiconductor (M–S) junction is a type of
junction in which a metal comes in close contact with a semiconductor
material. It is the oldest practical semiconductor device. M–S junctions can
either be rectifying or non-rectifying. The rectifying metal–semiconductor
junction forms a Schottky barrier, making a device known as a Schottky diode,
while the non-rectifying junction is called an ohmic contact.

4. The critical parameter: Schottky
barrier height:
 Whether a given metal-semiconductor junction is an ohmic contact, or
Schottky barrier, depends on the Schottky barrier height, ΦB, of the junction.
For a sufficiently large Schottky barrier height, where ΦB is significantly
higher than the thermal energy kT, the semiconductor is depleted near the
metal and behaves as a Schottky barrier.
 In practice, the Schottky barrier height is not precisely constant across the
interface, and varies over the interfacial surface.

5. Contd. :
• Although the Schottky–Mott model correctly predicted the
existence of band bending in the semiconductor, it was found
experimentally that it would give grossly incorrect predictions
for the height of the Schottky barrier. A phenomenon referred to
as "Fermi level pinning" caused some point of the band gap, at
which DOS exists, to be locked (pinned) to the Fermi level. This
made the Schottky barrier height almost completely insensitive
to the metal's work function:
where Ebandgap is the size of band gap in the semiconductor.
• Fermi level pinning phenomenon would naturally arise if there
were chargeable states in the semiconductor right at the
interface, with energies inside the semiconductor's gap.

6. Schottky Barrier:
 A Schottky barrier, named after Walter H. Schottky, is a potential energy
barrier for electrons formed at a metal–semiconductor junction.
 One of the primary characteristics of a Schottky barrier is the Schottky barrier
height, denoted by ΦB .
 The value of ΦB depends on the combination of metal and semiconductor.

7. Formation of Schottky barrier :
• The barrier between a metal and a semiconductor is
predicted by the Schottky-Mott rule to be proportional to
the difference of the metal-vacuum work function and the
semiconductor-vacuum electron affinity .
• In practice, however, most metal-semiconductor interfaces
do not follow this rule to the predicted degree. Instead, the
chemical termination of the semiconductor crystal against a
metal creates electron states within its band gap.
• The nature of these metal-induced gap states and their
occupation by electrons tends to pin the centre of the band
gap to the Fermi level, an effect known as Fermi level
pinning. Thus the heights of the Schottky barriers in metal-
semiconductor contacts often show little dependence on the
value of the semiconductor or metal work functions, in
strong contrast to the Schottky-Mott rule.

8. Rectifying properties :
 In a rectifying Schottky barrier, the barrier is high enough that there is a
depletion region in the semiconductor, near the interface. This gives the
barrier a high resistance when small voltage biases are applied to it.
 Under large voltage bias, the electric current flowing through the barrier is
essentially governed by the laws of thermionic emission, combined with the
fact that the Schottky barrier is fixed relative to the metal's Fermi level.

9. Contd.
Forward bias
Reverse bias
• Under forward bias, there are many thermally excited
electrons in the semiconductor that are able to pass over the
barrier. The passage of these electrons over the barrier
(without any electrons coming back) corresponds to a current
in the opposite direction. The current rises very rapidly with
bias, however at high biases the series resistance of the
semiconductor can start to limit the current.
• Under reverse bias, there is a small leakage current as some
thermally excited electrons in the metal have enough energy
to surmount the barrier. To first approximation this current
should be constant (as in the Shockley diode equation);
however, current rises gradually with reverse bias due to a
weak barrier lowering (similar to the vacuum Schottky effect).
At very high biases, the depletion region breaks down.
Metal / N – type
semiconductor

10. Schottky barrier dependence on
temperature:
 In this experiment the n-GaAs is taken with Pd
metal and by varying temperature the I-V
characteristics is observed.
 It is observed that the barrier height increases
with temperature.

11. Contd.
Since current transport across the
metal/semiconductor interface is a
temperature-activated process, electrons at
low temperatures are able to surmount the
lower barriers, and so transport mechanism
will be dominated by current flowing through
the lower Schottky barrier height and
consequently ideality factor will be larger.

12. Contd.
 The rate of change of barrier height for a particular carrier concentration of
n-GaAs and for a particular metal is the same at any temperature in the range
130–300 K. However, the rate of change of barrier height for different carrier
concentrations of n-GaAs at a particular temperature increases with carrier
concentration.

13. Contact Resistance and its Measurement
Technique

14.  Metal – Semiconductor Contacts
• Every semiconductor device has contacts.
• Contact resistance is a parasitic resistance.
• Contacts are almost always metal-semiconductor contacts.

15.  What is contact resistance
 Contact resistance refers to the resistance associated with the
metal/semiconductor barrier at the interface between the semiconductor
and metal contact
 The contact resistance RC has units of ohms. However, the resistance value for
any particular sample depends on the area of the metal/substrate interface. For
this reason, the term ρC, the specific contact resistance or the contact
resistivity, with units of ohm-cm2, is used since it is independent of the sample
geometry.

16.  CELL INTERFACES WHERE CONTACT
RESISTANCE IS IMPORTANT
Metal Substrate
surface
Formation route, notes
Fritted Ag
paste
Dielectric
coated Si
Fire through dielectric; precipitate
Ag crystallites at/near interface.
Plated Ni Si Low-temp fire to form Ni-silicide
interface layer
Low-temp
Ag paste
TCO Low temp fire to contact directly

17.  How it is important
 Measuring a contact resistance is important since it can be used as a response for
optimizing cell processing parameters within R&D experiments or even within the
operation of a factory line.
Method of the measuring a contact
resistance:-
 The most common method of directly measuring contact resistance is the Transmission
Line (or Transfer Length) Method (TLM).

18.  Transmission Line Model
 The theoretical expression of the contact resistance contribution to the series source and
drain resistance is
 where ρc is the specific contact resistance from the silicide to diffusion. The diffusion
layer under the silicide is characterized by Rs, the sheet resistance under the silicide, W is
the transistor width and L is the length of the silicide contact Lc is the transfer length
defined as

19.  The contact resistance defined by considering two cases like
 For L >> Lc, is reduced to:
 For L << Lc, is reduced to:

20.  Silicide to silicon contact resistance is investigated using a set of dedicated test structures with
silicided segments of varying lengths based on the Scott model of the Transmission Line Model
(TLM).
 The TLM structure consists of alternating silicided and unsilicided segments formed by using a
silicide blocking mask.

21.  The measurement technique involves forcing the current through the reference structure not
interrupted by silicide segments in series with the structures interrupted by one, two or n
silicided segments and measuring the voltage drop across each structure.
 As the structures have been designed to have equal silicided and non-silicided segments lengths,
the difference between the reference resistance and the other resistances is attributed to the
contact resistance contribution. Thus, the contact resistance of each structure measured
experimentally is expressed as:

22.  where Ri is the resistance of the structure interrupted by n silicided segments, Rref is the
resistance of the reference structure and W is the structure width.
 The theoretical expression of the silicide-to-silicon contact resistance for the test structure as
stated by Scott is given as:
 where ρc = LcR0W/2 is the specific contact resistance, Rs is the sheet resistance under the
silicide, W is the structure width and L is the length of the silicided segment. Lc is the transfer
length.

23.  Once more, two limiting cases for the contact resistance can be expressed,
for L >> Lc
 The limit expressed by corresponds to low contact resistance thus all the current flows through the silicide contact.
 The value of R0W obtained with the transmission line structure using the long silicided segments equals to limit achieved
with a transistor with long silicided contact. For L << Lc equation reduces to:

24.  The limit of shows the case when only a fraction of the current will flow in the silicided segment of the TLM.
 In the transistor all the current has to enter the silicide, resulting in lower drive current when L << Lc. By plotting
(Rc)measW as a function of silicided length L, the contact resistance saturates for L >> Lc to the maximum value R0W.
 The TLM contact resistance given by the equation can be expressed as:

25. Value of a specific contact resistance from TLM
method
ρc (x10-6 ohm.cm²)
N-type Spreading
resistance
TLM
Min 0.4 0.32
max 5 1.04
ρc (x10-6 ohm.cm²)
P-type Spreading
resistance
TLM
min 1 0.17
max 3 2.5

26. Temperature and Current Effects on
Contact Resistance

27. Temperature & Low Current Effects on Rc
Fig.1 Schematic cross section and TEM of an unstressed
W-contact with silicide and TiN barriers.
Table.1 Contact technologies evaluated in this study

28. Contact Resistance Model
• For contacts to heavily doped (N >
1017 cm-3) n and p type Si, tunneling is
the dominant carrier transport
mechanism.
• The temperature and dopant
concentration dependent contact
resistance to n+ and p+ Si can be
expressed as
• The contact resistance is known to
vary exponentially with the factor
(B/N-1).
• where B is dependent on the barrier
height ՓB
• N is the impurity doping concentration
at the metal-semiconductor interface
a) I-V characteristics of W-contact structures
with 35 nm silicide.
b) Contact resistance sensitivity with current (low current regime) at
two different temperatures for W-contacts to n+ and p+ Si.

29. Contact Resistance is
Dependent on Temperature.
• Fig. 4 shows the I-V characteristics of
both W and Al plug contacts to n+ Si
where the silicide thickness is only ̴ 9
nm.
• As the silicide thickness increases
more dopants may segregate into the
silicide and the interface moves down
into the Si where the doping
concentration may be lower.
• Thinner silicide therefore higher
impurity doping concentration.
• Higher doping concentration with thin
silicide results in a narrower depletion
region (smaller barrier width),
enhanced tunneling, and lower contact
resistance.
• Fig. 5 shows similar results for
contacts with thin silicide to p+ Si.
Fig. 4 I-V characteristics of W and Al plug contacts to n+ Si with 9
nm silicide gives nearly equal contact resistance.
Fig. 5. I-V characteristics of W and Al plug contacts to p+ Si with 9
nm silicide gives as also only slightly temperature sensitive.

30. Temperature sensitivity of the contact
resistance of W and Al plug contacts with 9 nm
silicide.
• Fig. 6 shows the temperature
sensitivity of the contacts to n+ and
p+ Si for both the W-plug and the Al
plug processes with 9 nm thick
silicide.
• It is observed that these contacts
have smaller contact resistance, and
decrease very slowly with
temperature.

31. Calculation of RC with respect
to B.
• Table 2. All other parameters like B, H
and N (for 35 nm TiSi2) were extracted
from contact resistance data.
• Fig. 7 gives the temperature
dependence of the parameter B for n
and p type Si. Fig. 7. Temperature dependence of B for n and p type Si
Table 2. Comparison of measured and calculated contact
resistance values using the model.

32. High Current Effects on RC.
• Fig. 8 which is DC behavior of the
contact structures (under positive
bias) with 35 nm silicide.
• Observed that resistance decreases
with increasing current.
• Now Fig. 8 is used along with Fig. 3
to plot the input power, P vs.
temperature rise, dT in Fig. 9
which is the thermal impedance
for both the n+ and p+ structures
are nearly identical as expected.
Fig. 8. I-V characteristics of n+ and p+ contacts in the
high current regime becomes non linear due to severe
self heating.

33. Temperature rise at the point of failure under
high current conditions is determined.

34. Examples of Contact Resistance and Schottky Barrier

39. References:
1. Studies on metal/ n -GaAs Schottky barrier diodes: The effects of temperature and
carrier concentrations by Sutanu Mangal and P. Banerji
2. Tung, Raymond T. (2014). "The physics and chemistry of the Schottky barrier height".
Applied Physics Reviews.
3. Scharfetter, D. L. (1965). "Minority carrier injection and charge storage in epitaxial
Schottky barrier diodes". Solid-State Electronics.
4. https://www.electrochem.org/dl/ma/206/pdfs/0844.pdf
5. https://www.brightspotautomation.com/.../Contact+resistance+-+BrightSpot+-+PVSC2...
6. https://ris.utwente.nl/ws/files/5422186/specific_contact_-_stavitski.pdf
7. CONTACT RESISTANCE AND METHODS FOR ITS DETERMINATION* SIMON S. COHEN Signal
Electronics Laboratory, General Electric Company, Corporate Research and
Development, Schenectady, N Y 12301 (U.S.A.)
8. Temperature and Current Effects on Small-Geometry-Contact Resistance Department
of Electrical Engineering and Computer Sciences, University of Calfornia, Berkeley.

40. Thank You!