This document compares RISC and CISC processor architectures. It discusses that CISC processors have more complex instructions that can perform multiple operations, while RISC processors have simpler instructions that are optimized to complete in one clock cycle. CISC was developed earlier when memory was expensive, to reduce the number of instructions, while RISC focuses on increasing processor speed. RISC has advantages of faster execution and simpler hardware design, while CISC allows for more compact code.
RISC - Reduced Instruction Set ComputingTushar Swami
A detailed presentation about what is RISC and some of the basic differences between RISC and CISC Computers.
Also enlisting some of the major applications of RISC in the field of Technology.
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
RISC (reduced instruction set computer)LokmanArman
RISC
Reduced Instruction Set Computer
What Is RISC?
History Of RISC.
Characteristics Of RISC.
Five Design Principles Of RISC.
What Actually RISC Does?
In Real Life Uses Of RISC In Computer Architecture.
Computer Architecture & Organization.
Pipelining is an speed up technique where multiple instructions are overlapped in execution on a processor. It is an important topic in Computer Architecture.
This slide try to relate the problem with real life scenario for easily understanding the concept and show the major inner mechanism.
RISC - Reduced Instruction Set ComputingTushar Swami
A detailed presentation about what is RISC and some of the basic differences between RISC and CISC Computers.
Also enlisting some of the major applications of RISC in the field of Technology.
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
RISC (reduced instruction set computer)LokmanArman
RISC
Reduced Instruction Set Computer
What Is RISC?
History Of RISC.
Characteristics Of RISC.
Five Design Principles Of RISC.
What Actually RISC Does?
In Real Life Uses Of RISC In Computer Architecture.
Computer Architecture & Organization.
Pipelining is an speed up technique where multiple instructions are overlapped in execution on a processor. It is an important topic in Computer Architecture.
This slide try to relate the problem with real life scenario for easily understanding the concept and show the major inner mechanism.
In these slides the registration organization and stack organization have discussed in detail. Stack organization is discussed with the aid of animation to let the user understand it in a better and easy way.
This slide contain the description about the various technique related to parallel Processing(vector Processing and array processor), Arithmetic pipeline, Instruction Pipeline, SIMD processor, Attached array processor
1. CISC VS. RISC.
2. Agenda.
3. CPU Architecture.
4. Instruction Set Architecture (ISA). Group of instructions to execute a program. Instructions are in the form of: Opcode + Operand. An agreement between hardware and human for making interaction. Example : ADD R1, R2, R3
Can be represented as :
00101111100001111001010101010101
10111010100011110101001011011010
Two major schools of ISA: CISC & RISC.
5. CISC Philosophy (Complex Instruction Set Computing). The primary goal is to complete a task in as few lines as possible. Used on PCs and laptops that need to process heavy graphics and computations. Each instruction consist of one step.
(ex: MULT 2:3, 5:2, load the two values into registers, multiplies the operands, and then stores the product in appropriate register).
6. CISC Pros & Cons. Instruction size is different from one operation to another. Operation size is smaller but no of cycles are more. Needs better hardware and powerful processing. Performance is slow due to the amount of clock time taken by different instructions.
7. RISC Philosophy (Reduced Instruction Set Computing). Use only simple instructions that can be executed within one clock cycle. Keep all instructions of same size. Allow only load/store instruction to access the memory.
(ex: MULT command divided into three separate commands:LOAD, PROD, and STORE).
8. RISC Pros & Cons. Allow free use of microprocessors space because of its simplicity. Needs large memory caches on the chip itself so require very fast memory. Give support for high level languages (like C, C++, Java). Performance depends on the programmer or compiler.
9. CPU Performance Equation. The following equation is commonly used for expressing a computer's performance ability:
퐶푃푈 푇푖푚푒=푆푒푐표푛푑푠/푃푟표푔푟푎푚=퐼푛푠푡푟푢푐푡푖표푛푠/푃푟표푔푟푎푚 푥 퐶푦푐푙푒푠/퐼푛푠푡푟푢푐푡푖표푛푠 푥 푆푒푐표푛푑푠/퐶푦푐푙푒
CISC minimize the number of instructions per program.
RISC does the opposite, reduce the cycles per instruction.
10. Summary.
Multiprocessor system is an interconnection of two or more CPUs with memory and input-output equipment
The components that forms multiprocessor are CPUs IOPs connected to input –output devices , and memory unit that may be partitioned into a number of separate modules.
Multiprocessor are classified as multiple instruction stream, multiple data stream (MIMD) system.
In many I/O interfacing applications and certainly in data acquisation system. it is often necessary to transfer data to or from an interface at data rates higher than those possible using simple programmed I/O loops
In these slides the registration organization and stack organization have discussed in detail. Stack organization is discussed with the aid of animation to let the user understand it in a better and easy way.
This slide contain the description about the various technique related to parallel Processing(vector Processing and array processor), Arithmetic pipeline, Instruction Pipeline, SIMD processor, Attached array processor
1. CISC VS. RISC.
2. Agenda.
3. CPU Architecture.
4. Instruction Set Architecture (ISA). Group of instructions to execute a program. Instructions are in the form of: Opcode + Operand. An agreement between hardware and human for making interaction. Example : ADD R1, R2, R3
Can be represented as :
00101111100001111001010101010101
10111010100011110101001011011010
Two major schools of ISA: CISC & RISC.
5. CISC Philosophy (Complex Instruction Set Computing). The primary goal is to complete a task in as few lines as possible. Used on PCs and laptops that need to process heavy graphics and computations. Each instruction consist of one step.
(ex: MULT 2:3, 5:2, load the two values into registers, multiplies the operands, and then stores the product in appropriate register).
6. CISC Pros & Cons. Instruction size is different from one operation to another. Operation size is smaller but no of cycles are more. Needs better hardware and powerful processing. Performance is slow due to the amount of clock time taken by different instructions.
7. RISC Philosophy (Reduced Instruction Set Computing). Use only simple instructions that can be executed within one clock cycle. Keep all instructions of same size. Allow only load/store instruction to access the memory.
(ex: MULT command divided into three separate commands:LOAD, PROD, and STORE).
8. RISC Pros & Cons. Allow free use of microprocessors space because of its simplicity. Needs large memory caches on the chip itself so require very fast memory. Give support for high level languages (like C, C++, Java). Performance depends on the programmer or compiler.
9. CPU Performance Equation. The following equation is commonly used for expressing a computer's performance ability:
퐶푃푈 푇푖푚푒=푆푒푐표푛푑푠/푃푟표푔푟푎푚=퐼푛푠푡푟푢푐푡푖표푛푠/푃푟표푔푟푎푚 푥 퐶푦푐푙푒푠/퐼푛푠푡푟푢푐푡푖표푛푠 푥 푆푒푐표푛푑푠/퐶푦푐푙푒
CISC minimize the number of instructions per program.
RISC does the opposite, reduce the cycles per instruction.
10. Summary.
Multiprocessor system is an interconnection of two or more CPUs with memory and input-output equipment
The components that forms multiprocessor are CPUs IOPs connected to input –output devices , and memory unit that may be partitioned into a number of separate modules.
Multiprocessor are classified as multiple instruction stream, multiple data stream (MIMD) system.
In many I/O interfacing applications and certainly in data acquisation system. it is often necessary to transfer data to or from an interface at data rates higher than those possible using simple programmed I/O loops
Dsdco IE: RISC and CISC architectures and design issuesHome
RISC is an alternative to the Complex Instruction Set Computing (CISC) architecture and is often considered the most efficient CPU architecture technology available today.
This slide contain the detail about the various organization of computer(Register based organization, Stack Based Organization and Accumulator Based Organization), Addressing Modes, Instruction Formats and finally RISC and CISC
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This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
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Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
2. 2
Topics Covered
•INTRODUCTION
•CISC ARCHITECTURE
•CHARACTERSTICS & PROPERTIES OF CISC
•ADVANTAGES & DISADVANTAGES OF CISC
• CISC INSTRUCTION EXAMPLE
•RISC ARCHITECTURE
•CHARACTERSTICS & PROPERTIES OF RISC
•ADVANTAGES & DISADVANTAGES OF RISC
•RISC INSTRUCTION EXAMPLE
•RISC 5 STAGE PIPELINING
•COMPARISON BETWEEN RISC & CISC PROCESSOR
3. 3
•A processor is the logic circuitry that responds to and processes
the basic instructions that drive a computer.
•CPU instructions are numbers stored in memory.
•Instruction set is a set of instructions a programmer can give to a
machine to perform operations.
•The instructions are specific to CPU architecture.
•Basic operations: read instruction from memory, decode,
execute ,write back.
Introduction
4. 4
Fundamentals
From the architecture point of view, the microprocessor chips can
be classified into two categories:
1. Complex Instruction Set Computers (CISC) and
2. Reduce Instruction Set Computers (RISC) .
5. 5
CISC: Complex Instruction Set Computers
History
•CISC existed close to the beginning of general computing.
•Since the earliest machines were programmed in assembly language
and memory was slow and expensive, IBM designed an instruction set to
allow early programmer to easily program a hundred complex instruction
rather than thousands of individual instructions.
•CISC was developed to make compiler development simpler. It shifts
most of the burden of generating machine instructions to the processor.
• For example, instead of having to make a compiler write long machine
instructions to calculate a square-root, a CISC processor would have a
built-in ability to do this.
6. 6
CISC Architecture
• Complex instruction set computing is a CPU design where
single instructions can execute several low-level operations (such
as a load from memory, an arithmetic operation, and a memory
store) or are capable of multi-step operations or addressing
modes within single instructions.
• Called “complex” because of the complex work performed per
instruction.
• Concept: Encode the intention directly.
• Eg:” add X and Y and put the result in Z” (for X,Y,Z memory
address)
• Problem: Some instruction take more time then others.
• Examples: x86, s390.
• Small number of general purpose registers
7. 7
cont….
• Computers typically use CISC while tablets, smartphones and other devices
use RISC.
• So, the higher efficiency of the RISC architecture makes it desirable in these
applications where cycles and power are usually in short supply.
• In CISC instructions are executed by microcode.
• A CISC instruction set typically includes many instructions
with different sizes and execution cycles, which makes CISC
instructions harder to pipeline.
8. 8
Characteristic of CISC Processors
•A CISC instruction can be thought to contain many different type of
instructions bundled into one simple instruction.
•A large number of instructions - typically from 100 to 250 instructions.
•Some instructions that perform specialized tasks and are used
infrequently.
•A large variety of addressing modes - typically 5 to 20 different modes.
•Variable-length instruction formats
•Instructions that manipulate operands in memory.
9. 9
Properties of a CISC Processor
1. Richer instruction set, some simple, some very complex.
2. Instructions generally take more than 1 clock to execute.
3. Instructions of a variable size.
4. Instructions is an interface with memory in multiple
mechanisms with complex addressing modes.
5. No pipelining.
6. Microcode control make CISC instruction set possible &
flexible.
7. Work well with simpler compiler.
10. 10
Advantage
• Microprogramming is as easy as assembly language to
implement, and much less expensive than hardwiring a control
unit.
• As each instruction became more capable, fewer instructions
could be used to implement a given task. This made more
efficient use of the relatively slow main memory.
• Because micro-program instruction sets can be written to match
the constructs of high-level languages, the compiler does not
have to be as complicated.
11. 11
Disadvantage
• Complex instructions are infrequently used by programmers and
compilers.
• Memory references, loads and stores, are slow and account for a
significant fraction of all instructions.
• Procedure and function calls are a major bottleneck
Passing arguments
Storing and retrieving values in registers.
• Instruction set & chip of new genration hardware become more complex
with each generation of computers.
12. 12
A CISC could multiply 5 by 10 as follows:
Mov ax,10
Mov bx,5
Mul bx
CISC Instruction Example
13. 13
RISC: Reduced Instruction Set Computer
History
The first RISC projects came from IBM, Stanford, and UC-Berkeley in the
late 70s and early 80s.
The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all
designed with a similar philosophy which has become known as RISC.
When designers create a new generation of processors, improving
performance is the key goal. There are three main factors that affect
performance; they are :
• How fast you can crank up the clock.
• How much work you can do per cycle.
• How many instructions you need to perform a task.
14. 14
RISC Architecture
• Called “reduced” because of the reduction of work performed by an
instructions.
• It is a type of microprocessor architecture that utilizes a small, highly-
optimized set of instructions, rather than a more specialized set of
instructions often found in other types of architectures.
• RISC's original goals was to limit the number of instructions on the chip
so that each could be allocated enough transistors to make it execute
in one cycle.
• Small set of instructions of a typical RISC processor consists mostly of
register-to-register operations, with only simple load and store
operations for memory access.
.
15. 15
• Thus each operand is brought into a processor register with
a load instruction
• All computations are done among the data stored in
processor registers.
• Results are transferred to memory by means of store
instructions.
• Concepts: Break operation into simpler sub operation.
• Eg: instruction: load X, load Y, add X and Y, store Z
cont….
16. 16
Characteristic of RISC Processors
• Simplifies the instruction set..
• The use of only a few addressing modes results from the fact
that almost all instructions have simple register addressing.
• Other addressing modes may be included, such as immediate
operands.
• By using a relatively simple instruction format, the instruction
length can be fixed and aligned on word boundaries.
• An important aspect of RISC instruction format is that it is easy
to decode.
• Shorter Instructions - Breaking the complex instruction into
several short simpler instructions
17. 17
cont….
• It has the ability to execute one instruction per clock cycle.
This is done by overlapping the fetch, decode and execute
phases of two or three instructions by using a procedure referred to
as pipelining.
• The advantage of register storage as opposed to memory storage
is that registers can transfer information to other registers much
faster than the transfer of information to and from memory.
• Relatively few instructions
• Relatively few addressing modes.
• Memory access limited to load and store instructions
• Can run several instructions simultaneously.
18. 18
Properties of a RISC Processor
1. Simple primitive instructions and addressing modes.
2. Instructions execute in one clock cycle.
3. Uniformed length instructions and fixed instruction format.
4. Instructions interface with memory via fixed
mechanisms(load/store).
5. Pipelining.
6. Hardwired control.
7. Complexity pushed to the compiler.
19. 19
Advantage
• Speed: RISC processors often achieve 2 to 4 times the
performance of CISC processors using comparable
semiconductor technology and the same clock rates.
• Simpler hardware. Because the instruction set of a RISC
processor is so simple, it uses up much less chip space and
simple hardware requirements.
• Shorter design cycle. Since RISC processors are simpler than
corresponding CISC processors, they can be designed more
quickly, and can complete there work in 1 clock cycle
20. 20
Disadvantage
• Code Quality: The performance of a RISC processor depends greatly
on the code that it is executing. If the programmer (or compiler) does a
poor job of instruction scheduling, the processor can spend quite a bit of
time stalling: waiting for the result of one instruction before it can
proceed with a subsequent instruction.
• Code expansion: Since CISC machines perform complex actions with
a single instruction, where RISC machines may require multiple
instructions for the same action, code expansion can be a problem.
• System Design: Another problem that faces RISC machines is that
they require very fast memory systems to feed them instructions. RISC-
based systems typically contain large memory caches, usually on the
chip itself. This is known as a first-level cache.
21. 21
RISC Instruction Example
• In RISC the microprocessor's designers might make sure that add
executes in one clock.
• Then a compiler could multiply a and b by adding a to itself b times
or b to itself a times.
Mov ax,0
Mov bx,10
Mov cx,5
Begin:
Add ax,bx
Loop Begin
loop cx times
22. 22
RISC 5 Stage Pipeling
• Fivestage “RISC” load- store architecture‐
1. Instruction fetch (IF)
• Get instruction from memory, increment PC.
2. Instruction Decode (ID)
• Translate opcode into control signals and read registers.
3. Execute (EX)
• Perform ALU operation, compute jump/branch target
4. Memory (MEM)
• Access memory if needed
5. Writeback (WB)
• Update register file
24. 24
• Instructions utilize more cycles than RISC.
• CISC has way more complex instructions than RISC.
• CISC typically has fewer instructions than RISC.
• CISC implementations tend to be slower than RISC
implementations.
• RISC design is approximately twice as cost-effective as CISC.
• RISC architectures are designed for a good cost/performance,
whereas CISC architectures are designed for a good
performance on slow memories.
Comparisons between CISC and RISC
Processors
25. 25
CISC RISC
Emphasis on hardware Emphasis on software
Includes multi-clock,
complex instructions
Single-clock, reduced instruction
only
Memory-to-memory:
"LOAD" and "STORE"
incorporated in instructions
Register to register:
"LOAD" and "STORE"
are independent instructions
Slower since instruction can take
more than 1 cycle
Faster since instructions usually
take 1 instruction cycle
Main objective is less code. Main objective is speed.
cont….
26. 26
CISC RISC
More hardware oriented.
More software oriented since the
compiler deals with
translations.
Instruction size is mostly varied
in size.
Instruction size is always a set
size.
Addressing Modes can be
complex
Addressing Modes are simple.
cont….
28. 28
Comparisons between CISC and RISC
Instructions
• Lets consider a simple example: addition of x and y
RISC Reduced Instruction Set Computers
– Break Operation into Simple Sub-Operation.
Load X,
Load Y,
add X and Y,
Store Z
CISC Complex Instruction Set Computers
– Encode the Instruction Directly
Add X & Y Put the Result in Z.